Lines Matching refs:dma_scr
176 u32 dma_scr; member
366 chan->chan_reg.dma_scr &= ~STM32_DMA_SCR_DMEIE; in stm32_dma_set_fifo_config()
370 chan->chan_reg.dma_scr |= STM32_DMA_SCR_DMEIE; in stm32_dma_set_fifo_config()
436 u32 dma_scr, id, reg; in stm32_dma_disable_chan() local
440 dma_scr = stm32_dma_read(dmadev, reg); in stm32_dma_disable_chan()
442 if (dma_scr & STM32_DMA_SCR_EN) { in stm32_dma_disable_chan()
443 dma_scr &= ~STM32_DMA_SCR_EN; in stm32_dma_disable_chan()
444 stm32_dma_write(dmadev, reg, dma_scr); in stm32_dma_disable_chan()
447 dma_scr, !(dma_scr & STM32_DMA_SCR_EN), in stm32_dma_disable_chan()
457 u32 dma_scr, dma_sfcr, status; in stm32_dma_stop() local
461 dma_scr = stm32_dma_read(dmadev, STM32_DMA_SCR(chan->id)); in stm32_dma_stop()
462 dma_scr &= ~STM32_DMA_SCR_IRQ_MASK; in stm32_dma_stop()
463 stm32_dma_write(dmadev, STM32_DMA_SCR(chan->id), dma_scr); in stm32_dma_stop()
563 reg->dma_scr &= ~STM32_DMA_SCR_EN; in stm32_dma_start_transfer()
564 stm32_dma_write(dmadev, STM32_DMA_SCR(chan->id), reg->dma_scr); in stm32_dma_start_transfer()
584 reg->dma_scr |= STM32_DMA_SCR_EN; in stm32_dma_start_transfer()
585 stm32_dma_write(dmadev, STM32_DMA_SCR(chan->id), reg->dma_scr); in stm32_dma_start_transfer()
596 u32 dma_scr, dma_sm0ar, dma_sm1ar, id; in stm32_dma_configure_next_sg() local
599 dma_scr = stm32_dma_read(dmadev, STM32_DMA_SCR(id)); in stm32_dma_configure_next_sg()
601 if (dma_scr & STM32_DMA_SCR_DBM) { in stm32_dma_configure_next_sg()
607 if (dma_scr & STM32_DMA_SCR_CT) { in stm32_dma_configure_next_sg()
712 u32 dma_scr, fifoth; in stm32_dma_set_xfer_param() local
754 dma_scr = STM32_DMA_SCR_DIR(STM32_DMA_MEM_TO_DEV) | in stm32_dma_set_xfer_param()
804 dma_scr = STM32_DMA_SCR_DIR(STM32_DMA_DEV_TO_MEM) | in stm32_dma_set_xfer_param()
828 chan->chan_reg.dma_scr &= ~(STM32_DMA_SCR_DIR_MASK | in stm32_dma_set_xfer_param()
831 chan->chan_reg.dma_scr |= dma_scr; in stm32_dma_set_xfer_param()
869 chan->chan_reg.dma_scr |= STM32_DMA_SCR_PFCTRL; in stm32_dma_prep_slave_sg()
871 chan->chan_reg.dma_scr &= ~STM32_DMA_SCR_PFCTRL; in stm32_dma_prep_slave_sg()
888 desc->sg_req[i].chan_reg.dma_scr = chan->chan_reg.dma_scr; in stm32_dma_prep_slave_sg()
955 chan->chan_reg.dma_scr |= STM32_DMA_SCR_CIRC; in stm32_dma_prep_dma_cyclic()
957 chan->chan_reg.dma_scr |= STM32_DMA_SCR_DBM; in stm32_dma_prep_dma_cyclic()
960 chan->chan_reg.dma_scr &= ~STM32_DMA_SCR_PFCTRL; in stm32_dma_prep_dma_cyclic()
972 desc->sg_req[i].chan_reg.dma_scr = chan->chan_reg.dma_scr; in stm32_dma_prep_dma_cyclic()
1016 desc->sg_req[i].chan_reg.dma_scr = in stm32_dma_prep_dma_memcpy()
1041 u32 dma_scr, width, ndtr; in stm32_dma_get_remaining_bytes() local
1044 dma_scr = stm32_dma_read(dmadev, STM32_DMA_SCR(chan->id)); in stm32_dma_get_remaining_bytes()
1045 width = STM32_DMA_SCR_PSIZE_GET(dma_scr); in stm32_dma_get_remaining_bytes()
1067 u32 dma_scr, dma_smar, id; in stm32_dma_is_current_sg() local
1070 dma_scr = stm32_dma_read(dmadev, STM32_DMA_SCR(id)); in stm32_dma_is_current_sg()
1072 if (!(dma_scr & STM32_DMA_SCR_DBM)) in stm32_dma_is_current_sg()
1077 if (dma_scr & STM32_DMA_SCR_CT) { in stm32_dma_is_current_sg()
1231 chan->chan_reg.dma_scr = cfg->stream_config & STM32_DMA_SCR_CFG_MASK; in stm32_dma_set_config()
1232 chan->chan_reg.dma_scr |= STM32_DMA_SCR_REQ(cfg->request_line); in stm32_dma_set_config()
1235 chan->chan_reg.dma_scr |= STM32_DMA_SCR_TEIE | STM32_DMA_SCR_TCIE; in stm32_dma_set_config()