902 	struct xor_regs *xor_reg;  in ppc440spe_adma_device_clear_eot_status()  local
984 		xor_reg = chan->device->xor_reg;  in ppc440spe_adma_device_clear_eot_status()
985 		rv = ioread32be(&xor_reg->sr);  in ppc440spe_adma_device_clear_eot_status()
986 		iowrite32be(rv, &xor_reg->sr);  in ppc440spe_adma_device_clear_eot_status()
993 				u32 val = ioread32be(&xor_reg->ccbalr);  in ppc440spe_adma_device_clear_eot_status()
995 				iowrite32be(val, &xor_reg->cblalr);  in ppc440spe_adma_device_clear_eot_status()
997 				val = ioread32be(&xor_reg->crsr);  in ppc440spe_adma_device_clear_eot_status()
999 					    &xor_reg->crsr);  in ppc440spe_adma_device_clear_eot_status()
1008 		if (!(ioread32be(&xor_reg->sr) & XOR_SR_XCP_BIT) &&  in ppc440spe_adma_device_clear_eot_status()
1021 	struct xor_regs *xor_reg;  in ppc440spe_chan_is_busy()  local
1038 		xor_reg = chan->device->xor_reg;  in ppc440spe_chan_is_busy()
1039 		busy = (ioread32be(&xor_reg->sr) & XOR_SR_XCP_BIT) ? 1 : 0;  in ppc440spe_chan_is_busy()
1053 	struct xor_regs *xor_reg = chan->device->xor_reg;  in ppc440spe_chan_set_first_xor_descriptor()  local
1055 	if (ioread32be(&xor_reg->sr) & XOR_SR_XCP_BIT)  in ppc440spe_chan_set_first_xor_descriptor()
1062 	iowrite32be(XOR_CRSR_64BA_BIT, &xor_reg->crsr);  in ppc440spe_chan_set_first_xor_descriptor()
1064 	iowrite32be(next_desc->phys, &xor_reg->cblalr);  in ppc440spe_chan_set_first_xor_descriptor()
1065 	iowrite32be(0, &xor_reg->cblahr);  in ppc440spe_chan_set_first_xor_descriptor()
1066 	iowrite32be(ioread32be(&xor_reg->cbcr) | XOR_CBCR_LNK_BIT,  in ppc440spe_chan_set_first_xor_descriptor()
1067 		    &xor_reg->cbcr);  in ppc440spe_chan_set_first_xor_descriptor()
1098 	struct xor_regs *xor_reg;  in ppc440spe_chan_append()  local
1138 		xor_reg = chan->device->xor_reg;  in ppc440spe_chan_append()
1147 		if (!(ioread32be(&xor_reg->sr) & XOR_SR_XCP_BIT)) {  in ppc440spe_chan_append()
1157 			iowrite32be(ioread32be(&xor_reg->crsr) |  in ppc440spe_chan_append()
1159 				    &xor_reg->crsr);  in ppc440spe_chan_append()
1178 	struct xor_regs *xor_reg;  in ppc440spe_chan_get_current_descriptor()  local
1190 		xor_reg = chan->device->xor_reg;  in ppc440spe_chan_get_current_descriptor()
1191 		return ioread32be(&xor_reg->ccbalr);  in ppc440spe_chan_get_current_descriptor()
1201 	struct xor_regs *xor_reg;  in ppc440spe_chan_run()  local
1210 		xor_reg = chan->device->xor_reg;  in ppc440spe_chan_run()
1214 			    &xor_reg->crsr);  in ppc440spe_chan_run()
3932 			    &adev->xor_reg->ier);  in ppc440spe_adma_setup_irqs()
3981 		mask = ioread32be(&adev->xor_reg->ier);  in ppc440spe_adma_release_irqs()
3984 		iowrite32be(mask, &adev->xor_reg->ier);  in ppc440spe_adma_release_irqs()
4102 		adev->xor_reg = regs;  in ppc440spe_adma_probe()
4104 		iowrite32be(XOR_CRSR_XASR_BIT, &adev->xor_reg->crsr);  in ppc440spe_adma_probe()
4105 		iowrite32be(XOR_CRSR_64BA_BIT, &adev->xor_reg->crrr);  in ppc440spe_adma_probe()
4215 		iounmap(adev->xor_reg);  in ppc440spe_adma_probe()
4278 		iounmap(adev->xor_reg);  in ppc440spe_adma_remove()