Lines Matching +full:max +full:- +full:burst +full:- +full:len
1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #include <linux/dma-mapping.h>
46 CCTRL6, /* Cacheable write-through, allocate on writes only */
47 CCTRL7, /* Cacheable write-back, allocate on writes only */
246 * at 1byte/burst for P<->M and M<->M respectively.
247 * For typical scenario, at 1word/burst, 10MB and 20MB xfers per req
248 * should be enough for P<->M and M<->M respectively.
304 * and burst size/length are assumed same.
352 BURST, enumerator
383 /* Index of the last submitted request or -1 if the DMA is stopped */
418 /* DMA-Engine Channel */
444 /* For D-to-M and M-to-D channels */
446 int burst_len; /* the number of burst */
448 /* DMA-mapped view of the FIFO; may differ if an IOMMU is present */
458 /* DMA-Engine Device */
506 .quirk = "arm,pl330-broken-no-flushp",
510 .quirk = "arm,pl330-periph-burst",
562 return thrd->req[0].desc != NULL && thrd->req[1].desc != NULL; in _queue_full()
567 return thrd->dmac->manager == thrd; in is_manager()
570 /* If manager of the thread is in Non-Secure mode */
573 return (thrd->dmac->pcfg.mode & DMAC_MODE_NS) ? true : false; in _manager_ns()
634 else if (cond == BURST) in _emit_LD()
638 cond == SINGLE ? 'S' : (cond == BURST ? 'B' : 'A')); in _emit_LD()
651 if (cond == BURST) in _emit_LDP()
675 cnt--; /* DMAC increments by 1 internally */ in _emit_LP()
693 enum pl330_cond cond = arg->cond; in _emit_LPEND()
694 bool forever = arg->forever; in _emit_LPEND()
695 unsigned loop = arg->loop; in _emit_LPEND()
696 u8 bjump = arg->bjump; in _emit_LPEND()
711 else if (cond == BURST) in _emit_LPEND()
718 cond == SINGLE ? 'S' : (cond == BURST ? 'B' : 'A'), in _emit_LPEND()
791 else if (cond == BURST) in _emit_ST()
795 cond == SINGLE ? 'S' : (cond == BURST ? 'B' : 'A')); in _emit_ST()
808 if (cond == BURST) in _emit_STP()
831 else if (cond == BURST) in _emit_WFP()
841 cond == SINGLE ? 'S' : (cond == BURST ? 'B' : 'P'), peri >> 3); in _emit_WFP()
867 u8 chan = arg->chan; in _emit_GO()
868 u32 addr = arg->addr; in _emit_GO()
869 unsigned ns = arg->ns; in _emit_GO()
887 /* Returns Time-Out */
890 void __iomem *regs = thrd->dmac->base; in _until_dmac_idle()
899 } while (--loops); in _until_dmac_idle()
910 void __iomem *regs = thrd->dmac->base; in _execute_DBGINSN()
913 /* If timed out due to halted state-machine */ in _execute_DBGINSN()
915 dev_err(thrd->dmac->ddma.dev, "DMAC halted!\n"); in _execute_DBGINSN()
922 val |= (thrd->id << 8); /* Channel Number */ in _execute_DBGINSN()
935 void __iomem *regs = thrd->dmac->base; in _state()
941 val = readl(regs + CS(thrd->id)) & 0xf; in _state()
993 void __iomem *regs = thrd->dmac->base; in _stop()
1011 if (inten & (1 << thrd->ev)) in _stop()
1012 writel(1 << thrd->ev, regs + INTCLR); in _stop()
1014 writel(inten & ~(1 << thrd->ev), regs + INTEN); in _stop()
1020 void __iomem *regs = thrd->dmac->base; in _trigger()
1032 idx = 1 - thrd->lstenq; in _trigger()
1033 if (thrd->req[idx].desc != NULL) { in _trigger()
1034 req = &thrd->req[idx]; in _trigger()
1036 idx = thrd->lstenq; in _trigger()
1037 if (thrd->req[idx].desc != NULL) in _trigger()
1038 req = &thrd->req[idx]; in _trigger()
1048 if (idx == thrd->req_running) in _trigger()
1051 desc = req->desc; in _trigger()
1053 ns = desc->rqcfg.nonsecure ? 1 : 0; in _trigger()
1055 /* See 'Abort Sources' point-4 at Page 2-25 */ in _trigger()
1057 dev_info(thrd->dmac->ddma.dev, "%s:%d Recipe for ABORT!\n", in _trigger()
1060 go.chan = thrd->id; in _trigger()
1061 go.addr = req->mc_bus; in _trigger()
1066 writel(readl(regs + INTEN) | (1 << thrd->ev), regs + INTEN); in _trigger()
1071 thrd->req_running = idx; in _trigger()
1116 struct pl330_config *pcfg = pxs->desc->rqcfg.pcfg; in _ldst_memtomem()
1118 /* check lock-up free version */ in _ldst_memtomem()
1119 if (get_revision(pcfg->periph_id) >= PERIPH_REV_R1P0) { in _ldst_memtomem()
1120 while (cyc--) { in _ldst_memtomem()
1125 while (cyc--) { in _ldst_memtomem()
1152 off += _emit_LDP(dry_run, &buf[off], BURST, in _emit_load()
1185 off += _emit_STP(dry_run, &buf[off], BURST, in _emit_store()
1213 if (!(pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP)) in _ldst_peripheral()
1214 off += _emit_FLUSHP(dry_run, &buf[off], pxs->desc->peri); in _ldst_peripheral()
1215 while (cyc--) { in _ldst_peripheral()
1216 off += _emit_WFP(dry_run, &buf[off], cond, pxs->desc->peri); in _ldst_peripheral()
1217 off += _emit_load(dry_run, &buf[off], cond, pxs->desc->rqtype, in _ldst_peripheral()
1218 pxs->desc->peri); in _ldst_peripheral()
1219 off += _emit_store(dry_run, &buf[off], cond, pxs->desc->rqtype, in _ldst_peripheral()
1220 pxs->desc->peri); in _ldst_peripheral()
1222 switch (pxs->desc->rqtype) { in _ldst_peripheral()
1225 if (pxs->desc->dst_interlace_size) in _ldst_peripheral()
1227 pxs->desc->dst_interlace_size); in _ldst_peripheral()
1230 if (pxs->desc->src_interlace_size) in _ldst_peripheral()
1232 pxs->desc->src_interlace_size); in _ldst_peripheral()
1248 enum pl330_cond cond = BRST_LEN(pxs->ccr) > 1 ? BURST : SINGLE; in _bursts()
1250 if (pl330->quirks & PL330_QUIRK_PERIPH_BURST) in _bursts()
1251 cond = BURST; in _bursts()
1253 switch (pxs->desc->rqtype) { in _bursts()
1275 * transfer dregs with a reduced size burst to peripheral,
1276 * or a reduced size burst for mem-to-mem.
1287 switch (pxs->desc->rqtype) { in _dregs()
1292 * dregs_len = (total bytes - BURST_TO_BYTE(bursts, ccr)) / in _dregs()
1294 * the dregs len must be smaller than burst len, in _dregs()
1296 * to use a reduced size burst len for the dregs. in _dregs()
1298 dregs_ccr = pxs->ccr; in _dregs()
1301 dregs_ccr |= (((transfer_length - 1) & 0xf) << in _dregs()
1303 dregs_ccr |= (((transfer_length - 1) & 0xf) << in _dregs()
1307 BURST); in _dregs()
1311 dregs_ccr = pxs->ccr; in _dregs()
1314 dregs_ccr |= (((transfer_length - 1) & 0xf) << in _dregs()
1316 dregs_ccr |= (((transfer_length - 1) & 0xf) << in _dregs()
1342 /* Max iterations possible in DMALP is 256 */ in _loop()
1372 * Max bursts that we can unroll due to limit on the in _loop()
1374 * which is 8-bits and hence 255 in _loop()
1376 cycmax = (255 - (szlp + szlpend)) / szbrst; in _loop()
1395 lpend.bjump = off - ljmp1; in _loop()
1402 lpend.bjump = off - ljmp0; in _loop()
1419 struct pl330_xfer *x = &pxs->desc->px; in _period()
1436 lpend.bjump = off - ljmp1; in _period()
1440 lcnt1 = bursts - (lcnt1 * cyc); in _period()
1449 lpend.bjump = off - ljmp1; in _period()
1454 if (!pxs->desc->src_interlace_size && in _period()
1455 !pxs->desc->dst_interlace_size) { in _period()
1456 num_dregs = BYTE_MOD_BURST_LEN(x->bytes, pxs->ccr); in _period()
1460 off += _emit_MOV(dry_run, &buf[off], CCR, pxs->ccr); in _period()
1464 num_dregs = BYTE_MOD_BURST_LEN(x->bytes, pxs->ccr); in _period()
1468 off += _emit_MOV(dry_run, &buf[off], CCR, pxs->ccr); in _period()
1484 struct pl330_xfer *x = &pxs->desc->px; in _loop_cyclic()
1488 lcnt0 = pxs->desc->num_periods; in _loop_cyclic()
1493 lcnt0 = pxs->desc->num_periods / periods; in _loop_cyclic()
1496 residue = pxs->desc->num_periods % periods; in _loop_cyclic()
1499 off += _emit_MOV(dry_run, &buf[off], SAR, x->src_addr); in _loop_cyclic()
1500 off += _emit_MOV(dry_run, &buf[off], DAR, x->dst_addr); in _loop_cyclic()
1512 lpend.bjump = off - ljmp0; in _loop_cyclic()
1521 lpend.bjump = off - ljmpfe; in _loop_cyclic()
1531 struct pl330_xfer *x = &pxs->desc->px; in _setup_loops()
1532 u32 ccr = pxs->ccr; in _setup_loops()
1533 unsigned long c, bursts = BYTE_TO_BURST(x->bytes, ccr); in _setup_loops()
1534 int num_dregs = (x->bytes - BURST_TO_BYTE(bursts, ccr)) / in _setup_loops()
1539 if (pxs->desc->rqtype == DMA_DEV_TO_MEM) in _setup_loops()
1540 bursts = x->bytes / (BRST_SIZE(ccr) * BRST_LEN(ccr) + in _setup_loops()
1541 pxs->desc->dst_interlace_size); in _setup_loops()
1542 else if (pxs->desc->rqtype == DMA_MEM_TO_DEV) in _setup_loops()
1543 bursts = x->bytes / (BRST_SIZE(ccr) * BRST_LEN(ccr) + in _setup_loops()
1544 pxs->desc->src_interlace_size); in _setup_loops()
1549 bursts -= c; in _setup_loops()
1552 if (!pxs->desc->src_interlace_size && in _setup_loops()
1553 !pxs->desc->dst_interlace_size) in _setup_loops()
1565 struct pl330_xfer *x = &pxs->desc->px; in _setup_xfer()
1568 /* DMAMOV SAR, x->src_addr */ in _setup_xfer()
1569 off += _emit_MOV(dry_run, &buf[off], SAR, x->src_addr); in _setup_xfer()
1570 /* DMAMOV DAR, x->dst_addr */ in _setup_xfer()
1571 off += _emit_MOV(dry_run, &buf[off], DAR, x->dst_addr); in _setup_xfer()
1583 struct pl330_xfer *x = &pxs->desc->px; in _setup_xfer_cyclic()
1584 u32 ccr = pxs->ccr; in _setup_xfer_cyclic()
1585 unsigned long bursts = BYTE_TO_BURST(x->bytes, ccr); in _setup_xfer_cyclic()
1589 if (pxs->desc->rqtype == DMA_DEV_TO_MEM) in _setup_xfer_cyclic()
1590 bursts = x->bytes / (BRST_SIZE(ccr) * BRST_LEN(ccr) in _setup_xfer_cyclic()
1591 + pxs->desc->dst_interlace_size); in _setup_xfer_cyclic()
1592 else if (pxs->desc->rqtype == DMA_MEM_TO_DEV) in _setup_xfer_cyclic()
1593 bursts = x->bytes / (BRST_SIZE(ccr) * BRST_LEN(ccr) in _setup_xfer_cyclic()
1594 + pxs->desc->src_interlace_size); in _setup_xfer_cyclic()
1610 struct _pl330_req *req = &thrd->req[index]; in _setup_req()
1611 u8 *buf = req->mc_cpu; in _setup_req()
1614 PL330_DBGMC_START(req->mc_bus); in _setup_req()
1617 off += _emit_MOV(dry_run, &buf[off], CCR, pxs->ccr); in _setup_req()
1619 if (!pxs->desc->cyclic) { in _setup_req()
1623 off += _emit_SEV(dry_run, &buf[off], thrd->ev); in _setup_req()
1628 pxs, thrd->ev); in _setup_req()
1638 if (rqc->src_inc) in _prepare_ccr()
1641 if (rqc->dst_inc) in _prepare_ccr()
1645 if (rqc->privileged) in _prepare_ccr()
1647 if (rqc->nonsecure) in _prepare_ccr()
1649 if (rqc->insnaccess) in _prepare_ccr()
1652 ccr |= (((rqc->brst_len - 1) & 0xf) << CC_SRCBRSTLEN_SHFT); in _prepare_ccr()
1653 ccr |= (((rqc->brst_len - 1) & 0xf) << CC_DSTBRSTLEN_SHFT); in _prepare_ccr()
1655 ccr |= (rqc->brst_size << CC_SRCBRSTSIZE_SHFT); in _prepare_ccr()
1656 ccr |= (rqc->brst_size << CC_DSTBRSTSIZE_SHFT); in _prepare_ccr()
1658 ccr |= (rqc->scctl << CC_SRCCCTRL_SHFT); in _prepare_ccr()
1659 ccr |= (rqc->dcctl << CC_DSTCCTRL_SHFT); in _prepare_ccr()
1661 ccr |= (rqc->swap << CC_SWAP_SHFT); in _prepare_ccr()
1674 struct pl330_dmac *pl330 = thrd->dmac; in pl330_submit_req()
1681 switch (desc->rqtype) { in pl330_submit_req()
1692 return -ENOTSUPP; in pl330_submit_req()
1695 if (pl330->state == DYING in pl330_submit_req()
1696 || pl330->dmac_tbd.reset_chan & (1 << thrd->id)) { in pl330_submit_req()
1697 dev_info(thrd->dmac->ddma.dev, "%s:%d\n", in pl330_submit_req()
1699 return -EAGAIN; in pl330_submit_req()
1702 /* If request for non-existing peripheral */ in pl330_submit_req()
1703 if (desc->rqtype != DMA_MEM_TO_MEM && in pl330_submit_req()
1704 desc->peri >= pl330->pcfg.num_peri) { in pl330_submit_req()
1705 dev_info(thrd->dmac->ddma.dev, in pl330_submit_req()
1707 __func__, __LINE__, desc->peri); in pl330_submit_req()
1708 return -EINVAL; in pl330_submit_req()
1711 spin_lock_irqsave(&pl330->lock, flags); in pl330_submit_req()
1714 ret = -EAGAIN; in pl330_submit_req()
1720 desc->rqcfg.nonsecure = 0; in pl330_submit_req()
1722 desc->rqcfg.nonsecure = 1; in pl330_submit_req()
1724 ccr = _prepare_ccr(&desc->rqcfg); in pl330_submit_req()
1726 idx = thrd->req[0].desc == NULL ? 0 : 1; in pl330_submit_req()
1736 if (ret > pl330->mcbufsz / 2) { in pl330_submit_req()
1737 dev_info(pl330->ddma.dev, "%s:%d Try increasing mcbufsz (%i/%i)\n", in pl330_submit_req()
1738 __func__, __LINE__, ret, pl330->mcbufsz / 2); in pl330_submit_req()
1739 ret = -ENOMEM; in pl330_submit_req()
1744 thrd->lstenq = idx; in pl330_submit_req()
1745 thrd->req[idx].desc = desc; in pl330_submit_req()
1751 spin_unlock_irqrestore(&pl330->lock, flags); in pl330_submit_req()
1764 pch = desc->pchan; in dma_pl330_rqcb()
1770 spin_lock_irqsave(&pch->lock, flags); in dma_pl330_rqcb()
1772 desc->status = DONE; in dma_pl330_rqcb()
1774 spin_unlock_irqrestore(&pch->lock, flags); in dma_pl330_rqcb()
1776 tasklet_schedule(&pch->task); in dma_pl330_rqcb()
1785 spin_lock_irqsave(&pl330->lock, flags); in pl330_dotask()
1788 if (pl330->dmac_tbd.reset_dmac) { in pl330_dotask()
1789 pl330->state = DYING; in pl330_dotask()
1791 pl330->dmac_tbd.reset_mngr = true; in pl330_dotask()
1793 pl330->dmac_tbd.reset_dmac = false; in pl330_dotask()
1796 if (pl330->dmac_tbd.reset_mngr) { in pl330_dotask()
1797 _stop(pl330->manager); in pl330_dotask()
1799 pl330->dmac_tbd.reset_chan = (1 << pl330->pcfg.num_chan) - 1; in pl330_dotask()
1801 pl330->dmac_tbd.reset_mngr = false; in pl330_dotask()
1804 for (i = 0; i < pl330->pcfg.num_chan; i++) { in pl330_dotask()
1806 if (pl330->dmac_tbd.reset_chan & (1 << i)) { in pl330_dotask()
1807 struct pl330_thread *thrd = &pl330->channels[i]; in pl330_dotask()
1808 void __iomem *regs = pl330->base; in pl330_dotask()
1813 if (readl(regs + FSC) & (1 << thrd->id)) in pl330_dotask()
1818 spin_unlock_irqrestore(&pl330->lock, flags); in pl330_dotask()
1819 dma_pl330_rqcb(thrd->req[1 - thrd->lstenq].desc, err); in pl330_dotask()
1820 dma_pl330_rqcb(thrd->req[thrd->lstenq].desc, err); in pl330_dotask()
1821 spin_lock_irqsave(&pl330->lock, flags); in pl330_dotask()
1823 thrd->req[0].desc = NULL; in pl330_dotask()
1824 thrd->req[1].desc = NULL; in pl330_dotask()
1825 thrd->req_running = -1; in pl330_dotask()
1828 pl330->dmac_tbd.reset_chan &= ~(1 << i); in pl330_dotask()
1832 spin_unlock_irqrestore(&pl330->lock, flags); in pl330_dotask()
1846 regs = pl330->base; in pl330_update()
1848 spin_lock_irqsave(&pl330->lock, flags); in pl330_update()
1852 pl330->dmac_tbd.reset_mngr = true; in pl330_update()
1854 pl330->dmac_tbd.reset_mngr = false; in pl330_update()
1856 val = readl(regs + FSC) & ((1 << pl330->pcfg.num_chan) - 1); in pl330_update()
1857 pl330->dmac_tbd.reset_chan |= val; in pl330_update()
1860 while (i < pl330->pcfg.num_chan) { in pl330_update()
1862 dev_info(pl330->ddma.dev, in pl330_update()
1863 "Reset Channel-%d\t CS-%x FTC-%x\n", in pl330_update()
1866 _stop(&pl330->channels[i]); in pl330_update()
1874 if (pl330->pcfg.num_events < 32 in pl330_update()
1875 && val & ~((1 << pl330->pcfg.num_events) - 1)) { in pl330_update()
1876 pl330->dmac_tbd.reset_dmac = true; in pl330_update()
1877 dev_err(pl330->ddma.dev, "%s:%d Unexpected!\n", __func__, in pl330_update()
1883 for (ev = 0; ev < pl330->pcfg.num_events; ev++) { in pl330_update()
1895 id = pl330->events[ev]; in pl330_update()
1897 thrd = &pl330->channels[id]; in pl330_update()
1899 active = thrd->req_running; in pl330_update()
1900 if (active == -1) /* Aborted */ in pl330_update()
1904 descdone = thrd->req[active].desc; in pl330_update()
1906 if (!descdone->cyclic) { in pl330_update()
1907 thrd->req[active].desc = NULL; in pl330_update()
1908 thrd->req_running = -1; in pl330_update()
1914 list_add_tail(&descdone->rqd, &pl330->req_done); in pl330_update()
1920 while (!list_empty(&pl330->req_done)) { in pl330_update()
1921 descdone = list_first_entry(&pl330->req_done, in pl330_update()
1923 list_del(&descdone->rqd); in pl330_update()
1924 spin_unlock_irqrestore(&pl330->lock, flags); in pl330_update()
1926 spin_lock_irqsave(&pl330->lock, flags); in pl330_update()
1930 spin_unlock_irqrestore(&pl330->lock, flags); in pl330_update()
1932 if (pl330->dmac_tbd.reset_dmac in pl330_update()
1933 || pl330->dmac_tbd.reset_mngr in pl330_update()
1934 || pl330->dmac_tbd.reset_chan) { in pl330_update()
1936 tasklet_schedule(&pl330->tasks); in pl330_update()
1945 struct pl330_dmac *pl330 = thrd->dmac; in _alloc_event()
1948 for (ev = 0; ev < pl330->pcfg.num_events; ev++) in _alloc_event()
1949 if (pl330->events[ev] == -1) { in _alloc_event()
1950 pl330->events[ev] = thrd->id; in _alloc_event()
1954 return -1; in _alloc_event()
1959 return pl330->pcfg.irq_ns & (1 << i); in _chan_ns()
1970 if (pl330->state == DYING) in pl330_request_channel()
1973 chans = pl330->pcfg.num_chan; in pl330_request_channel()
1976 thrd = &pl330->channels[i]; in pl330_request_channel()
1977 if ((thrd->free) && (!_manager_ns(thrd) || in pl330_request_channel()
1979 thrd->ev = _alloc_event(thrd); in pl330_request_channel()
1980 if (thrd->ev >= 0) { in pl330_request_channel()
1981 thrd->free = false; in pl330_request_channel()
1982 thrd->lstenq = 1; in pl330_request_channel()
1983 thrd->req[0].desc = NULL; in pl330_request_channel()
1984 thrd->req[1].desc = NULL; in pl330_request_channel()
1985 thrd->req_running = -1; in pl330_request_channel()
1998 struct pl330_dmac *pl330 = thrd->dmac; in _free_event()
2001 if (ev >= 0 && ev < pl330->pcfg.num_events in _free_event()
2002 && pl330->events[ev] == thrd->id) in _free_event()
2003 pl330->events[ev] = -1; in _free_event()
2008 if (!thrd || thrd->free) in pl330_release_channel()
2013 dma_pl330_rqcb(thrd->req[1 - thrd->lstenq].desc, PL330_ERR_ABORT); in pl330_release_channel()
2014 dma_pl330_rqcb(thrd->req[thrd->lstenq].desc, PL330_ERR_ABORT); in pl330_release_channel()
2016 _free_event(thrd, thrd->ev); in pl330_release_channel()
2017 thrd->free = true; in pl330_release_channel()
2025 void __iomem *regs = pl330->base; in read_dmac_config()
2030 pl330->pcfg.data_bus_width = 8 * (1 << val); in read_dmac_config()
2034 pl330->pcfg.data_buf_dep = val + 1; in read_dmac_config()
2039 pl330->pcfg.num_chan = val; in read_dmac_config()
2045 pl330->pcfg.num_peri = val; in read_dmac_config()
2046 pl330->pcfg.peri_ns = readl(regs + CR4); in read_dmac_config()
2048 pl330->pcfg.num_peri = 0; in read_dmac_config()
2053 pl330->pcfg.mode |= DMAC_MODE_NS; in read_dmac_config()
2055 pl330->pcfg.mode &= ~DMAC_MODE_NS; in read_dmac_config()
2060 pl330->pcfg.num_events = val; in read_dmac_config()
2062 pl330->pcfg.irq_ns = readl(regs + CR3); in read_dmac_config()
2067 struct pl330_dmac *pl330 = thrd->dmac; in _reset_thread()
2069 thrd->req[0].mc_cpu = pl330->mcode_cpu in _reset_thread()
2070 + (thrd->id * pl330->mcbufsz); in _reset_thread()
2071 thrd->req[0].mc_bus = pl330->mcode_bus in _reset_thread()
2072 + (thrd->id * pl330->mcbufsz); in _reset_thread()
2073 thrd->req[0].desc = NULL; in _reset_thread()
2075 thrd->req[1].mc_cpu = thrd->req[0].mc_cpu in _reset_thread()
2076 + pl330->mcbufsz / 2; in _reset_thread()
2077 thrd->req[1].mc_bus = thrd->req[0].mc_bus in _reset_thread()
2078 + pl330->mcbufsz / 2; in _reset_thread()
2079 thrd->req[1].desc = NULL; in _reset_thread()
2081 thrd->req_running = -1; in _reset_thread()
2086 int chans = pl330->pcfg.num_chan; in dmac_alloc_threads()
2091 pl330->channels = kcalloc(1 + chans, sizeof(*thrd), in dmac_alloc_threads()
2093 if (!pl330->channels) in dmac_alloc_threads()
2094 return -ENOMEM; in dmac_alloc_threads()
2098 thrd = &pl330->channels[i]; in dmac_alloc_threads()
2099 thrd->id = i; in dmac_alloc_threads()
2100 thrd->dmac = pl330; in dmac_alloc_threads()
2102 thrd->free = true; in dmac_alloc_threads()
2106 thrd = &pl330->channels[chans]; in dmac_alloc_threads()
2107 thrd->id = chans; in dmac_alloc_threads()
2108 thrd->dmac = pl330; in dmac_alloc_threads()
2109 thrd->free = false; in dmac_alloc_threads()
2110 pl330->manager = thrd; in dmac_alloc_threads()
2117 int chans = pl330->pcfg.num_chan; in dmac_alloc_resources()
2124 pl330->mcode_cpu = dma_alloc_attrs(pl330->ddma.dev, in dmac_alloc_resources()
2125 chans * pl330->mcbufsz, in dmac_alloc_resources()
2126 &pl330->mcode_bus, GFP_KERNEL, in dmac_alloc_resources()
2128 if (!pl330->mcode_cpu) { in dmac_alloc_resources()
2129 dev_err(pl330->ddma.dev, "%s:%d Can't allocate memory!\n", in dmac_alloc_resources()
2131 return -ENOMEM; in dmac_alloc_resources()
2136 dev_err(pl330->ddma.dev, "%s:%d Can't to create channels for DMAC!\n", in dmac_alloc_resources()
2138 dma_free_attrs(pl330->ddma.dev, in dmac_alloc_resources()
2139 chans * pl330->mcbufsz, in dmac_alloc_resources()
2140 pl330->mcode_cpu, pl330->mcode_bus, in dmac_alloc_resources()
2153 if ((pl330->pcfg.periph_id & 0xfffff) != PERIPH_ID_VAL) { in pl330_add()
2154 dev_err(pl330->ddma.dev, "PERIPH_ID 0x%x !\n", in pl330_add()
2155 pl330->pcfg.periph_id); in pl330_add()
2156 return -EINVAL; in pl330_add()
2162 if (pl330->pcfg.num_events == 0) { in pl330_add()
2163 dev_err(pl330->ddma.dev, "%s:%d Can't work without events!\n", in pl330_add()
2165 return -EINVAL; in pl330_add()
2168 spin_lock_init(&pl330->lock); in pl330_add()
2170 INIT_LIST_HEAD(&pl330->req_done); in pl330_add()
2173 if (!pl330->mcbufsz) in pl330_add()
2174 pl330->mcbufsz = MCODE_BUFF_PER_REQ * 2; in pl330_add()
2177 for (i = 0; i < pl330->pcfg.num_events; i++) in pl330_add()
2178 pl330->events[i] = -1; in pl330_add()
2183 dev_err(pl330->ddma.dev, "Unable to create channels for DMAC\n"); in pl330_add()
2187 tasklet_setup(&pl330->tasks, pl330_dotask); in pl330_add()
2189 pl330->state = INIT; in pl330_add()
2200 for (i = 0; i < pl330->pcfg.num_chan; i++) { in dmac_free_threads()
2201 thrd = &pl330->channels[i]; in dmac_free_threads()
2206 kfree(pl330->channels); in dmac_free_threads()
2213 pl330->state = UNINIT; in pl330_del()
2215 tasklet_kill(&pl330->tasks); in pl330_del()
2220 dma_free_attrs(pl330->ddma.dev, in pl330_del()
2221 pl330->pcfg.num_chan * pl330->mcbufsz, pl330->mcode_cpu, in pl330_del()
2222 pl330->mcode_bus, DMA_ATTR_PRIVILEGED); in pl330_del()
2248 list_for_each_entry(desc, &pch->work_list, node) { in fill_queue()
2251 if (desc->status == BUSY) in fill_queue()
2254 ret = pl330_submit_req(pch->thread, desc); in fill_queue()
2256 desc->status = BUSY; in fill_queue()
2257 } else if (ret == -EAGAIN) { in fill_queue()
2262 desc->status = DONE; in fill_queue()
2263 dev_err(pch->dmac->ddma.dev, "%s:%d Bad Desc(%d)\n", in fill_queue()
2264 __func__, __LINE__, desc->txd.cookie); in fill_queue()
2265 tasklet_schedule(&pch->task); in fill_queue()
2277 spin_lock_irqsave(&pch->lock, flags); in pl330_tasklet()
2280 list_for_each_entry_safe(desc, _dt, &pch->work_list, node) { in pl330_tasklet()
2281 if (desc->status == DONE) { in pl330_tasklet()
2282 if (!desc->cyclic) { in pl330_tasklet()
2283 dma_cookie_complete(&desc->txd); in pl330_tasklet()
2284 list_move_tail(&desc->node, &pch->completed_list); in pl330_tasklet()
2288 desc->status = BUSY; in pl330_tasklet()
2289 dmaengine_desc_get_callback(&desc->txd, &cb); in pl330_tasklet()
2292 spin_unlock_irqrestore(&pch->lock, flags); in pl330_tasklet()
2294 spin_lock_irqsave(&pch->lock, flags); in pl330_tasklet()
2303 if (list_empty(&pch->work_list)) { in pl330_tasklet()
2304 spin_lock(&pch->thread->dmac->lock); in pl330_tasklet()
2305 _stop(pch->thread); in pl330_tasklet()
2306 spin_unlock(&pch->thread->dmac->lock); in pl330_tasklet()
2307 power_down = pch->active; in pl330_tasklet()
2308 pch->active = false; in pl330_tasklet()
2311 spin_lock(&pch->thread->dmac->lock); in pl330_tasklet()
2312 _start(pch->thread); in pl330_tasklet()
2313 spin_unlock(&pch->thread->dmac->lock); in pl330_tasklet()
2316 while (!list_empty(&pch->completed_list)) { in pl330_tasklet()
2319 desc = list_first_entry(&pch->completed_list, in pl330_tasklet()
2322 dmaengine_desc_get_callback(&desc->txd, &cb); in pl330_tasklet()
2324 desc->status = FREE; in pl330_tasklet()
2325 list_move_tail(&desc->node, &pch->dmac->desc_pool); in pl330_tasklet()
2327 dma_descriptor_unmap(&desc->txd); in pl330_tasklet()
2330 spin_unlock_irqrestore(&pch->lock, flags); in pl330_tasklet()
2332 spin_lock_irqsave(&pch->lock, flags); in pl330_tasklet()
2335 spin_unlock_irqrestore(&pch->lock, flags); in pl330_tasklet()
2339 pm_runtime_mark_last_busy(pch->dmac->ddma.dev); in pl330_tasklet()
2340 pm_runtime_put_autosuspend(pch->dmac->ddma.dev); in pl330_tasklet()
2347 int count = dma_spec->args_count; in of_dma_pl330_xlate()
2348 struct pl330_dmac *pl330 = ofdma->of_dma_data; in of_dma_pl330_xlate()
2357 chan_id = dma_spec->args[0]; in of_dma_pl330_xlate()
2358 if (chan_id >= pl330->num_peripherals) in of_dma_pl330_xlate()
2361 return dma_get_slave_channel(&pl330->peripherals[chan_id].chan); in of_dma_pl330_xlate()
2367 struct pl330_dmac *pl330 = pch->dmac; in pl330_alloc_chan_resources()
2370 spin_lock_irqsave(&pl330->lock, flags); in pl330_alloc_chan_resources()
2374 pch->thread = pl330_request_channel(pl330); in pl330_alloc_chan_resources()
2375 if (!pch->thread) { in pl330_alloc_chan_resources()
2376 spin_unlock_irqrestore(&pl330->lock, flags); in pl330_alloc_chan_resources()
2377 return -ENOMEM; in pl330_alloc_chan_resources()
2380 tasklet_setup(&pch->task, pl330_tasklet); in pl330_alloc_chan_resources()
2382 spin_unlock_irqrestore(&pl330->lock, flags); in pl330_alloc_chan_resources()
2388 * We need the data direction between the DMAC (the dma-mapping "device") and
2408 if (pch->dir != DMA_NONE) in pl330_unprep_slave_fifo()
2409 dma_unmap_resource(pch->chan.device->dev, pch->fifo_dma, in pl330_unprep_slave_fifo()
2410 1 << pch->burst_sz, pch->dir, 0); in pl330_unprep_slave_fifo()
2411 pch->dir = DMA_NONE; in pl330_unprep_slave_fifo()
2418 struct device *dev = pch->chan.device->dev; in pl330_prep_slave_fifo()
2422 if (pch->dir == dma_dir) in pl330_prep_slave_fifo()
2426 pch->fifo_dma = dma_map_resource(dev, pch->fifo_addr, in pl330_prep_slave_fifo()
2427 1 << pch->burst_sz, dma_dir, 0); in pl330_prep_slave_fifo()
2428 if (dma_mapping_error(dev, pch->fifo_dma)) in pl330_prep_slave_fifo()
2431 pch->dir = dma_dir; in pl330_prep_slave_fifo()
2453 if (slave_config->dst_addr) in pl330_config_write()
2454 pch->fifo_addr = slave_config->dst_addr; in pl330_config_write()
2455 if (slave_config->dst_addr_width) in pl330_config_write()
2456 pch->burst_sz = __ffs(slave_config->dst_addr_width); in pl330_config_write()
2458 if (slave_config->src_interlace_size) in pl330_config_write()
2459 pch->slave_config.src_interlace_size = slave_config->src_interlace_size; in pl330_config_write()
2461 pch->burst_len = fixup_burst_len(slave_config->dst_maxburst, in pl330_config_write()
2462 pch->dmac->quirks); in pl330_config_write()
2464 if (slave_config->src_addr) in pl330_config_write()
2465 pch->fifo_addr = slave_config->src_addr; in pl330_config_write()
2466 if (slave_config->src_addr_width) in pl330_config_write()
2467 pch->burst_sz = __ffs(slave_config->src_addr_width); in pl330_config_write()
2469 if (slave_config->dst_interlace_size) in pl330_config_write()
2470 pch->slave_config.dst_interlace_size = slave_config->dst_interlace_size; in pl330_config_write()
2472 pch->burst_len = fixup_burst_len(slave_config->src_maxburst, in pl330_config_write()
2473 pch->dmac->quirks); in pl330_config_write()
2484 memcpy(&pch->slave_config, slave_config, sizeof(*slave_config)); in pl330_config()
2494 struct pl330_dmac *pl330 = pch->dmac; in pl330_terminate_all()
2497 pm_runtime_get_sync(pl330->ddma.dev); in pl330_terminate_all()
2498 spin_lock_irqsave(&pch->lock, flags); in pl330_terminate_all()
2500 spin_lock(&pl330->lock); in pl330_terminate_all()
2501 _stop(pch->thread); in pl330_terminate_all()
2502 pch->thread->req[0].desc = NULL; in pl330_terminate_all()
2503 pch->thread->req[1].desc = NULL; in pl330_terminate_all()
2504 pch->thread->req_running = -1; in pl330_terminate_all()
2505 spin_unlock(&pl330->lock); in pl330_terminate_all()
2507 power_down = pch->active; in pl330_terminate_all()
2508 pch->active = false; in pl330_terminate_all()
2511 list_for_each_entry(desc, &pch->submitted_list, node) { in pl330_terminate_all()
2512 desc->status = FREE; in pl330_terminate_all()
2513 dma_cookie_complete(&desc->txd); in pl330_terminate_all()
2516 list_for_each_entry(desc, &pch->work_list , node) { in pl330_terminate_all()
2517 desc->status = FREE; in pl330_terminate_all()
2518 dma_cookie_complete(&desc->txd); in pl330_terminate_all()
2521 list_splice_tail_init(&pch->submitted_list, &pl330->desc_pool); in pl330_terminate_all()
2522 list_splice_tail_init(&pch->work_list, &pl330->desc_pool); in pl330_terminate_all()
2523 list_splice_tail_init(&pch->completed_list, &pl330->desc_pool); in pl330_terminate_all()
2524 spin_unlock_irqrestore(&pch->lock, flags); in pl330_terminate_all()
2525 pm_runtime_mark_last_busy(pl330->ddma.dev); in pl330_terminate_all()
2527 pm_runtime_put_autosuspend(pl330->ddma.dev); in pl330_terminate_all()
2528 pm_runtime_put_autosuspend(pl330->ddma.dev); in pl330_terminate_all()
2543 struct pl330_dmac *pl330 = pch->dmac; in pl330_pause()
2546 pm_runtime_get_sync(pl330->ddma.dev); in pl330_pause()
2547 spin_lock_irqsave(&pch->lock, flags); in pl330_pause()
2549 spin_lock(&pl330->lock); in pl330_pause()
2550 _stop(pch->thread); in pl330_pause()
2551 spin_unlock(&pl330->lock); in pl330_pause()
2553 spin_unlock_irqrestore(&pch->lock, flags); in pl330_pause()
2554 pm_runtime_mark_last_busy(pl330->ddma.dev); in pl330_pause()
2555 pm_runtime_put_autosuspend(pl330->ddma.dev); in pl330_pause()
2563 struct pl330_dmac *pl330 = pch->dmac; in pl330_free_chan_resources()
2566 tasklet_kill(&pch->task); in pl330_free_chan_resources()
2568 pm_runtime_get_sync(pch->dmac->ddma.dev); in pl330_free_chan_resources()
2569 spin_lock_irqsave(&pl330->lock, flags); in pl330_free_chan_resources()
2571 pl330_release_channel(pch->thread); in pl330_free_chan_resources()
2572 pch->thread = NULL; in pl330_free_chan_resources()
2574 list_splice_tail_init(&pch->work_list, &pch->dmac->desc_pool); in pl330_free_chan_resources()
2576 spin_unlock_irqrestore(&pl330->lock, flags); in pl330_free_chan_resources()
2577 pm_runtime_mark_last_busy(pch->dmac->ddma.dev); in pl330_free_chan_resources()
2578 pm_runtime_put_autosuspend(pch->dmac->ddma.dev); in pl330_free_chan_resources()
2585 struct pl330_thread *thrd = pch->thread; in pl330_get_current_xferred_count()
2586 struct pl330_dmac *pl330 = pch->dmac; in pl330_get_current_xferred_count()
2587 void __iomem *regs = thrd->dmac->base; in pl330_get_current_xferred_count()
2590 pm_runtime_get_sync(pl330->ddma.dev); in pl330_get_current_xferred_count()
2592 if (desc->rqcfg.src_inc) { in pl330_get_current_xferred_count()
2593 val = readl(regs + SA(thrd->id)); in pl330_get_current_xferred_count()
2594 addr = desc->px.src_addr; in pl330_get_current_xferred_count()
2596 val = readl(regs + DA(thrd->id)); in pl330_get_current_xferred_count()
2597 addr = desc->px.dst_addr; in pl330_get_current_xferred_count()
2599 pm_runtime_mark_last_busy(pch->dmac->ddma.dev); in pl330_get_current_xferred_count()
2600 pm_runtime_put_autosuspend(pl330->ddma.dev); in pl330_get_current_xferred_count()
2606 return val - addr; in pl330_get_current_xferred_count()
2627 spin_lock_irqsave(&pch->lock, flags); in pl330_tx_status()
2628 spin_lock(&pch->thread->dmac->lock); in pl330_tx_status()
2630 if (pch->thread->req_running != -1) in pl330_tx_status()
2631 running = pch->thread->req[pch->thread->req_running].desc; in pl330_tx_status()
2633 last_enq = pch->thread->req[pch->thread->lstenq].desc; in pl330_tx_status()
2636 list_for_each_entry(desc, &pch->work_list, node) { in pl330_tx_status()
2637 if (desc->status == DONE && !desc->cyclic) in pl330_tx_status()
2638 transferred = desc->bytes_requested; in pl330_tx_status()
2642 else if (desc->status == BUSY) in pl330_tx_status()
2650 transferred = desc->bytes_requested; in pl330_tx_status()
2653 residual += desc->bytes_requested - transferred; in pl330_tx_status()
2654 if (desc->txd.cookie == cookie) { in pl330_tx_status()
2655 switch (desc->status) { in pl330_tx_status()
2668 if (desc->last) in pl330_tx_status()
2671 spin_unlock(&pch->thread->dmac->lock); in pl330_tx_status()
2672 spin_unlock_irqrestore(&pch->lock, flags); in pl330_tx_status()
2685 spin_lock_irqsave(&pch->lock, flags); in pl330_issue_pending()
2686 if (list_empty(&pch->work_list)) { in pl330_issue_pending()
2692 WARN_ON(list_empty(&pch->submitted_list)); in pl330_issue_pending()
2693 pch->active = true; in pl330_issue_pending()
2694 pm_runtime_get_sync(pch->dmac->ddma.dev); in pl330_issue_pending()
2696 list_splice_tail_init(&pch->submitted_list, &pch->work_list); in pl330_issue_pending()
2697 spin_unlock_irqrestore(&pch->lock, flags); in pl330_issue_pending()
2699 pl330_tasklet(&pch->task); in pl330_issue_pending()
2710 struct dma_pl330_chan *pch = to_pchan(tx->chan); in pl330_tx_submit()
2714 spin_lock_irqsave(&pch->lock, flags); in pl330_tx_submit()
2717 while (!list_empty(&last->node)) { in pl330_tx_submit()
2718 desc = list_entry(last->node.next, struct dma_pl330_desc, node); in pl330_tx_submit()
2720 desc->last = false; in pl330_tx_submit()
2722 dma_cookie_assign(&desc->txd); in pl330_tx_submit()
2724 list_move_tail(&desc->node, &pch->submitted_list); in pl330_tx_submit()
2727 last->last = true; in pl330_tx_submit()
2728 cookie = dma_cookie_assign(&last->txd); in pl330_tx_submit()
2729 list_add_tail(&last->node, &pch->submitted_list); in pl330_tx_submit()
2730 spin_unlock_irqrestore(&pch->lock, flags); in pl330_tx_submit()
2737 desc->rqcfg.swap = SWAP_NO; in _init_desc()
2738 desc->rqcfg.scctl = CCTRL0; in _init_desc()
2739 desc->rqcfg.dcctl = CCTRL0; in _init_desc()
2740 desc->txd.tx_submit = pl330_tx_submit; in _init_desc()
2742 INIT_LIST_HEAD(&desc->node); in _init_desc()
2778 desc = list_entry(pool->next, in pluck_desc()
2781 list_del_init(&desc->node); in pluck_desc()
2783 desc->status = PREP; in pluck_desc()
2784 desc->txd.callback = NULL; in pluck_desc()
2794 struct pl330_dmac *pl330 = pch->dmac; in pl330_get_desc()
2795 u8 *peri_id = pch->chan.private; in pl330_get_desc()
2799 desc = pluck_desc(&pl330->desc_pool, &pl330->pool_lock); in pl330_get_desc()
2814 desc->pchan = pch; in pl330_get_desc()
2815 desc->txd.cookie = 0; in pl330_get_desc()
2816 async_tx_ack(&desc->txd); in pl330_get_desc()
2818 desc->peri = peri_id ? pch->chan.chan_id : 0; in pl330_get_desc()
2819 desc->rqcfg.pcfg = &pch->dmac->pcfg; in pl330_get_desc()
2821 desc->cyclic = false; in pl330_get_desc()
2822 desc->num_periods = 1; in pl330_get_desc()
2824 dma_async_tx_descriptor_init(&desc->txd, &pch->chan); in pl330_get_desc()
2830 dma_addr_t dst, dma_addr_t src, size_t len) in fill_px() argument
2832 px->bytes = len; in fill_px()
2833 px->dst_addr = dst; in fill_px()
2834 px->src_addr = src; in fill_px()
2839 dma_addr_t src, size_t len) in __pl330_prep_dma_memcpy() argument
2844 dev_err(pch->dmac->ddma.dev, "%s:%d Unable to fetch desc\n", in __pl330_prep_dma_memcpy()
2853 * going to be word-unaligned and more than 200MB, in __pl330_prep_dma_memcpy()
2859 fill_px(&desc->px, dst, src, len); in __pl330_prep_dma_memcpy()
2864 /* Call after fixing burst size */
2865 static inline int get_burst_len(struct dma_pl330_desc *desc, size_t len) in get_burst_len() argument
2867 struct dma_pl330_chan *pch = desc->pchan; in get_burst_len()
2868 struct pl330_dmac *pl330 = pch->dmac; in get_burst_len()
2871 burst_len = pl330->pcfg.data_bus_width / 8; in get_burst_len()
2872 burst_len *= pl330->pcfg.data_buf_dep / pl330->pcfg.num_chan; in get_burst_len()
2873 burst_len >>= desc->rqcfg.brst_size; in get_burst_len()
2883 struct dma_chan *chan, dma_addr_t dma_addr, size_t len, in pl330_prep_dma_cyclic() argument
2892 if (len % period_len != 0) in pl330_prep_dma_cyclic()
2896 dev_err(pch->dmac->ddma.dev, "%s:%d Invalid dma direction\n", in pl330_prep_dma_cyclic()
2901 pl330_config_write(chan, &pch->slave_config, direction); in pl330_prep_dma_cyclic()
2908 dev_err(pch->dmac->ddma.dev, "%s:%d Unable to fetch desc\n", in pl330_prep_dma_cyclic()
2915 desc->rqcfg.src_inc = 1; in pl330_prep_dma_cyclic()
2916 desc->rqcfg.dst_inc = 0; in pl330_prep_dma_cyclic()
2918 dst = pch->fifo_dma; in pl330_prep_dma_cyclic()
2921 desc->rqcfg.src_inc = 0; in pl330_prep_dma_cyclic()
2922 desc->rqcfg.dst_inc = 1; in pl330_prep_dma_cyclic()
2923 src = pch->fifo_dma; in pl330_prep_dma_cyclic()
2930 desc->rqtype = direction; in pl330_prep_dma_cyclic()
2931 desc->rqcfg.brst_size = pch->burst_sz; in pl330_prep_dma_cyclic()
2932 desc->rqcfg.brst_len = pch->burst_len; in pl330_prep_dma_cyclic()
2933 desc->bytes_requested = len; in pl330_prep_dma_cyclic()
2934 fill_px(&desc->px, dst, src, period_len); in pl330_prep_dma_cyclic()
2936 desc->cyclic = true; in pl330_prep_dma_cyclic()
2937 desc->num_periods = len / period_len; in pl330_prep_dma_cyclic()
2938 desc->txd.flags = flags; in pl330_prep_dma_cyclic()
2940 desc->src_interlace_size = pch->slave_config.src_interlace_size; in pl330_prep_dma_cyclic()
2941 desc->dst_interlace_size = pch->slave_config.dst_interlace_size; in pl330_prep_dma_cyclic()
2943 return &desc->txd; in pl330_prep_dma_cyclic()
2948 dma_addr_t src, size_t len, unsigned long flags) in pl330_prep_dma_memcpy() argument
2953 int burst; in pl330_prep_dma_memcpy() local
2955 if (unlikely(!pch || !len)) in pl330_prep_dma_memcpy()
2958 pl330 = pch->dmac; in pl330_prep_dma_memcpy()
2960 desc = __pl330_prep_dma_memcpy(pch, dst, src, len); in pl330_prep_dma_memcpy()
2964 desc->rqcfg.src_inc = 1; in pl330_prep_dma_memcpy()
2965 desc->rqcfg.dst_inc = 1; in pl330_prep_dma_memcpy()
2966 desc->rqtype = DMA_MEM_TO_MEM; in pl330_prep_dma_memcpy()
2968 /* Select max possible burst size */ in pl330_prep_dma_memcpy()
2969 burst = pl330->pcfg.data_bus_width / 8; in pl330_prep_dma_memcpy()
2972 * Make sure we use a burst size that aligns with all the memcpy in pl330_prep_dma_memcpy()
2976 while ((src | dst | len) & (burst - 1)) in pl330_prep_dma_memcpy()
2977 burst /= 2; in pl330_prep_dma_memcpy()
2979 desc->rqcfg.brst_size = 0; in pl330_prep_dma_memcpy()
2980 while (burst != (1 << desc->rqcfg.brst_size)) in pl330_prep_dma_memcpy()
2981 desc->rqcfg.brst_size++; in pl330_prep_dma_memcpy()
2983 desc->rqcfg.brst_len = get_burst_len(desc, len); in pl330_prep_dma_memcpy()
2985 * If burst size is smaller than bus width then make sure we only in pl330_prep_dma_memcpy()
2986 * transfer one at a time to avoid a burst stradling an MFIFO entry. in pl330_prep_dma_memcpy()
2988 if (burst * 8 < pl330->pcfg.data_bus_width) in pl330_prep_dma_memcpy()
2989 desc->rqcfg.brst_len = 1; in pl330_prep_dma_memcpy()
2991 desc->bytes_requested = len; in pl330_prep_dma_memcpy()
2993 desc->txd.flags = flags; in pl330_prep_dma_memcpy()
2995 return &desc->txd; in pl330_prep_dma_memcpy()
3007 spin_lock_irqsave(&pl330->pool_lock, flags); in __pl330_giveback_desc()
3009 while (!list_empty(&first->node)) { in __pl330_giveback_desc()
3010 desc = list_entry(first->node.next, in __pl330_giveback_desc()
3012 list_move_tail(&desc->node, &pl330->desc_pool); in __pl330_giveback_desc()
3015 list_move_tail(&first->node, &pl330->desc_pool); in __pl330_giveback_desc()
3017 spin_unlock_irqrestore(&pl330->pool_lock, flags); in __pl330_giveback_desc()
3033 pl330_config_write(chan, &pch->slave_config, direction); in pl330_prep_slave_sg()
3044 struct pl330_dmac *pl330 = pch->dmac; in pl330_prep_slave_sg()
3046 dev_err(pch->dmac->ddma.dev, in pl330_prep_slave_sg()
3057 list_add_tail(&desc->node, &first->node); in pl330_prep_slave_sg()
3060 desc->rqcfg.src_inc = 1; in pl330_prep_slave_sg()
3061 desc->rqcfg.dst_inc = 0; in pl330_prep_slave_sg()
3062 fill_px(&desc->px, pch->fifo_dma, sg_dma_address(sg), in pl330_prep_slave_sg()
3065 desc->rqcfg.src_inc = 0; in pl330_prep_slave_sg()
3066 desc->rqcfg.dst_inc = 1; in pl330_prep_slave_sg()
3067 fill_px(&desc->px, sg_dma_address(sg), pch->fifo_dma, in pl330_prep_slave_sg()
3071 desc->rqcfg.brst_size = pch->burst_sz; in pl330_prep_slave_sg()
3072 desc->rqcfg.brst_len = pch->burst_len; in pl330_prep_slave_sg()
3073 desc->rqtype = direction; in pl330_prep_slave_sg()
3074 desc->bytes_requested = sg_dma_len(sg); in pl330_prep_slave_sg()
3076 desc->src_interlace_size = pch->slave_config.src_interlace_size; in pl330_prep_slave_sg()
3077 desc->dst_interlace_size = pch->slave_config.dst_interlace_size; in pl330_prep_slave_sg()
3082 desc->txd.flags = flg; in pl330_prep_slave_sg()
3083 return &desc->txd; in pl330_prep_slave_sg()
3104 struct pl330_dmac *pl330 = s->private; in pl330_debugfs_show()
3107 chans = pl330->pcfg.num_chan; in pl330_debugfs_show()
3108 pchs = pl330->num_peripherals; in pl330_debugfs_show()
3112 seq_puts(s, "--------\t-----\n"); in pl330_debugfs_show()
3114 struct pl330_thread *thrd = &pl330->channels[ch]; in pl330_debugfs_show()
3115 int found = -1; in pl330_debugfs_show()
3118 struct dma_pl330_chan *pch = &pl330->peripherals[pr]; in pl330_debugfs_show()
3120 if (!pch->thread || thrd->id != pch->thread->id) in pl330_debugfs_show()
3126 seq_printf(s, "%d\t\t", thrd->id); in pl330_debugfs_show()
3127 if (found == -1) in pl330_debugfs_show()
3128 seq_puts(s, "--\n"); in pl330_debugfs_show()
3140 debugfs_create_file(dev_name(pl330->ddma.dev), in init_pl330_debugfs()
3194 struct device_node *np = adev->dev.of_node; in pl330_probe()
3196 ret = dma_set_mask_and_coherent(&adev->dev, DMA_BIT_MASK(32)); in pl330_probe()
3201 pl330 = devm_kzalloc(&adev->dev, sizeof(*pl330), GFP_KERNEL); in pl330_probe()
3203 return -ENOMEM; in pl330_probe()
3205 pd = &pl330->ddma; in pl330_probe()
3206 pd->dev = &adev->dev; in pl330_probe()
3208 pl330->mcbufsz = 0; in pl330_probe()
3213 pl330->quirks |= of_quirks[i].id; in pl330_probe()
3215 res = &adev->res; in pl330_probe()
3216 pl330->base = devm_ioremap_resource(&adev->dev, res); in pl330_probe()
3217 if (IS_ERR(pl330->base)) in pl330_probe()
3218 return PTR_ERR(pl330->base); in pl330_probe()
3222 pl330->rstc = devm_reset_control_get_optional(&adev->dev, "dma"); in pl330_probe()
3223 if (IS_ERR(pl330->rstc)) { in pl330_probe()
3224 return dev_err_probe(&adev->dev, PTR_ERR(pl330->rstc), "Failed to get reset!\n"); in pl330_probe()
3226 ret = reset_control_deassert(pl330->rstc); in pl330_probe()
3228 dev_err(&adev->dev, "Couldn't deassert the device from reset!\n"); in pl330_probe()
3233 pl330->rstc_ocp = devm_reset_control_get_optional(&adev->dev, "dma-ocp"); in pl330_probe()
3234 if (IS_ERR(pl330->rstc_ocp)) { in pl330_probe()
3235 return dev_err_probe(&adev->dev, PTR_ERR(pl330->rstc_ocp), in pl330_probe()
3238 ret = reset_control_deassert(pl330->rstc_ocp); in pl330_probe()
3240 dev_err(&adev->dev, "Couldn't deassert the device from OCP reset!\n"); in pl330_probe()
3246 irq = adev->irq[i]; in pl330_probe()
3248 ret = devm_request_irq(&adev->dev, irq, in pl330_probe()
3250 dev_name(&adev->dev), pl330); in pl330_probe()
3258 pcfg = &pl330->pcfg; in pl330_probe()
3260 pcfg->periph_id = adev->periphid; in pl330_probe()
3265 INIT_LIST_HEAD(&pl330->desc_pool); in pl330_probe()
3266 spin_lock_init(&pl330->pool_lock); in pl330_probe()
3269 if (!add_desc(&pl330->desc_pool, &pl330->pool_lock, in pl330_probe()
3271 dev_warn(&adev->dev, "unable to allocate desc\n"); in pl330_probe()
3273 INIT_LIST_HEAD(&pd->channels); in pl330_probe()
3276 num_chan = max_t(int, pcfg->num_peri, pcfg->num_chan); in pl330_probe()
3278 pl330->num_peripherals = num_chan; in pl330_probe()
3280 pl330->peripherals = kcalloc(num_chan, sizeof(*pch), GFP_KERNEL); in pl330_probe()
3281 if (!pl330->peripherals) { in pl330_probe()
3282 ret = -ENOMEM; in pl330_probe()
3287 pch = &pl330->peripherals[i]; in pl330_probe()
3289 pch->chan.private = adev->dev.of_node; in pl330_probe()
3290 INIT_LIST_HEAD(&pch->submitted_list); in pl330_probe()
3291 INIT_LIST_HEAD(&pch->work_list); in pl330_probe()
3292 INIT_LIST_HEAD(&pch->completed_list); in pl330_probe()
3293 spin_lock_init(&pch->lock); in pl330_probe()
3294 pch->thread = NULL; in pl330_probe()
3295 pch->chan.device = pd; in pl330_probe()
3296 pch->dmac = pl330; in pl330_probe()
3297 pch->dir = DMA_NONE; in pl330_probe()
3300 list_add_tail(&pch->chan.device_node, &pd->channels); in pl330_probe()
3303 dma_cap_set(DMA_MEMCPY, pd->cap_mask); in pl330_probe()
3304 if (pcfg->num_peri) { in pl330_probe()
3305 dma_cap_set(DMA_SLAVE, pd->cap_mask); in pl330_probe()
3306 dma_cap_set(DMA_CYCLIC, pd->cap_mask); in pl330_probe()
3307 dma_cap_set(DMA_PRIVATE, pd->cap_mask); in pl330_probe()
3310 pd->device_alloc_chan_resources = pl330_alloc_chan_resources; in pl330_probe()
3311 pd->device_free_chan_resources = pl330_free_chan_resources; in pl330_probe()
3312 pd->device_prep_dma_memcpy = pl330_prep_dma_memcpy; in pl330_probe()
3313 pd->device_prep_dma_cyclic = pl330_prep_dma_cyclic; in pl330_probe()
3314 pd->device_tx_status = pl330_tx_status; in pl330_probe()
3315 pd->device_prep_slave_sg = pl330_prep_slave_sg; in pl330_probe()
3316 pd->device_config = pl330_config; in pl330_probe()
3317 pd->device_pause = pl330_pause; in pl330_probe()
3318 pd->device_terminate_all = pl330_terminate_all; in pl330_probe()
3319 pd->device_issue_pending = pl330_issue_pending; in pl330_probe()
3320 pd->src_addr_widths = PL330_DMA_BUSWIDTHS; in pl330_probe()
3321 pd->dst_addr_widths = PL330_DMA_BUSWIDTHS; in pl330_probe()
3322 pd->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV); in pl330_probe()
3323 pd->residue_granularity = DMA_RESIDUE_GRANULARITY_BURST; in pl330_probe()
3324 pd->max_burst = PL330_MAX_BURST; in pl330_probe()
3328 dev_err(&adev->dev, "unable to register DMAC\n"); in pl330_probe()
3332 if (adev->dev.of_node) { in pl330_probe()
3333 ret = of_dma_controller_register(adev->dev.of_node, in pl330_probe()
3336 dev_err(&adev->dev, in pl330_probe()
3345 ret = dma_set_max_seg_size(&adev->dev, 1900800); in pl330_probe()
3347 dev_err(&adev->dev, "unable to set the seg size\n"); in pl330_probe()
3351 dev_info(&adev->dev, in pl330_probe()
3352 "Loaded driver for PL330 DMAC-%x\n", adev->periphid); in pl330_probe()
3353 dev_info(&adev->dev, in pl330_probe()
3354 "\tDBUFF-%ux%ubytes Num_Chans-%u Num_Peri-%u Num_Events-%u\n", in pl330_probe()
3355 pcfg->data_buf_dep, pcfg->data_bus_width / 8, pcfg->num_chan, in pl330_probe()
3356 pcfg->num_peri, pcfg->num_events); in pl330_probe()
3358 pm_runtime_irq_safe(&adev->dev); in pl330_probe()
3359 pm_runtime_use_autosuspend(&adev->dev); in pl330_probe()
3360 pm_runtime_set_autosuspend_delay(&adev->dev, PL330_AUTOSUSPEND_DELAY); in pl330_probe()
3361 pm_runtime_mark_last_busy(&adev->dev); in pl330_probe()
3362 pm_runtime_put_autosuspend(&adev->dev); in pl330_probe()
3367 list_for_each_entry_safe(pch, _p, &pl330->ddma.channels, in pl330_probe()
3371 list_del(&pch->chan.device_node); in pl330_probe()
3374 if (pch->thread) { in pl330_probe()
3375 pl330_terminate_all(&pch->chan); in pl330_probe()
3376 pl330_free_chan_resources(&pch->chan); in pl330_probe()
3382 if (pl330->rstc_ocp) in pl330_probe()
3383 reset_control_assert(pl330->rstc_ocp); in pl330_probe()
3385 if (pl330->rstc) in pl330_probe()
3386 reset_control_assert(pl330->rstc); in pl330_probe()
3396 pm_runtime_get_noresume(pl330->ddma.dev); in pl330_remove()
3398 if (adev->dev.of_node) in pl330_remove()
3399 of_dma_controller_free(adev->dev.of_node); in pl330_remove()
3402 irq = adev->irq[i]; in pl330_remove()
3404 devm_free_irq(&adev->dev, irq, pl330); in pl330_remove()
3407 dma_async_device_unregister(&pl330->ddma); in pl330_remove()
3410 list_for_each_entry_safe(pch, _p, &pl330->ddma.channels, in pl330_remove()
3414 list_del(&pch->chan.device_node); in pl330_remove()
3417 if (pch->thread) { in pl330_remove()
3418 pl330_terminate_all(&pch->chan); in pl330_remove()
3419 pl330_free_chan_resources(&pch->chan); in pl330_remove()
3425 if (pl330->rstc_ocp) in pl330_remove()
3426 reset_control_assert(pl330->rstc_ocp); in pl330_remove()
3428 if (pl330->rstc) in pl330_remove()
3429 reset_control_assert(pl330->rstc); in pl330_remove()
3445 .name = "dma-pl330",