256 static void imx_dmav1_writel(struct imxdma_engine *imxdma, unsigned val,  in imx_dmav1_writel()  function
292 		imx_dmav1_writel(imxdma, sg->dma_address,  in imxdma_sg_next()
295 		imx_dmav1_writel(imxdma, sg->dma_address,  in imxdma_sg_next()
298 	imx_dmav1_writel(imxdma, now, DMA_CNTR(imxdmac->channel));  in imxdma_sg_next()
318 	imx_dmav1_writel(imxdma, 1 << channel, DMA_DISR);  in imxdma_enable_hw()
319 	imx_dmav1_writel(imxdma, imx_dmav1_readl(imxdma, DMA_DIMR) &  in imxdma_enable_hw()
321 	imx_dmav1_writel(imxdma, imx_dmav1_readl(imxdma, DMA_CCR(channel)) |  in imxdma_enable_hw()
331 			imx_dmav1_writel(imxdma, tmp | CCR_RPT | CCR_ACRPT,  in imxdma_enable_hw()
351 	imx_dmav1_writel(imxdma, imx_dmav1_readl(imxdma, DMA_DIMR) |  in imxdma_disable_hw()
353 	imx_dmav1_writel(imxdma, imx_dmav1_readl(imxdma, DMA_CCR(channel)) &  in imxdma_disable_hw()
355 	imx_dmav1_writel(imxdma, 1 << channel, DMA_DISR);  in imxdma_disable_hw()
365 	imx_dmav1_writel(imxdma, 0, DMA_CCR(channel));  in imxdma_watchdog()
390 	imx_dmav1_writel(imxdma, disr & err_mask, DMA_DISR);  in imxdma_err_handler()
398 			imx_dmav1_writel(imxdma, 1 << i, DMA_DBTOSR);  in imxdma_err_handler()
402 			imx_dmav1_writel(imxdma, 1 << i, DMA_DRTOSR);  in imxdma_err_handler()
406 			imx_dmav1_writel(imxdma, 1 << i, DMA_DSESR);  in imxdma_err_handler()
410 			imx_dmav1_writel(imxdma, 1 << i, DMA_DBOSR);  in imxdma_err_handler()
461 				imx_dmav1_writel(imxdma, tmp, DMA_CCR(chno));  in dma_irq_handle_channel()
463 				imx_dmav1_writel(imxdma, tmp & ~CCR_CEN,  in dma_irq_handle_channel()
468 			imx_dmav1_writel(imxdma, tmp, DMA_CCR(chno));  in dma_irq_handle_channel()
484 	imx_dmav1_writel(imxdma, 0, DMA_CCR(chno));  in dma_irq_handle_channel()
501 	imx_dmav1_writel(imxdma, disr, DMA_DISR);  in dma_irq_handler()
544 			imx_dmav1_writel(imxdma, d->x, DMA_XSRA);  in imxdma_xfer_desc()
545 			imx_dmav1_writel(imxdma, d->y, DMA_YSRA);  in imxdma_xfer_desc()
546 			imx_dmav1_writel(imxdma, d->w, DMA_WSRA);  in imxdma_xfer_desc()
550 			imx_dmav1_writel(imxdma, d->x, DMA_XSRB);  in imxdma_xfer_desc()
551 			imx_dmav1_writel(imxdma, d->y, DMA_YSRB);  in imxdma_xfer_desc()
552 			imx_dmav1_writel(imxdma, d->w, DMA_WSRB);  in imxdma_xfer_desc()
560 		imx_dmav1_writel(imxdma, d->src, DMA_SAR(imxdmac->channel));  in imxdma_xfer_desc()
561 		imx_dmav1_writel(imxdma, d->dest, DMA_DAR(imxdmac->channel));  in imxdma_xfer_desc()
562 		imx_dmav1_writel(imxdma, d->config_mem | (d->config_port << 2),  in imxdma_xfer_desc()
565 		imx_dmav1_writel(imxdma, d->len, DMA_CNTR(imxdmac->channel));  in imxdma_xfer_desc()
578 			imx_dmav1_writel(imxdma, imxdmac->per_address,  in imxdma_xfer_desc()
580 			imx_dmav1_writel(imxdma, imxdmac->ccr_from_device,  in imxdma_xfer_desc()
589 			imx_dmav1_writel(imxdma, imxdmac->per_address,  in imxdma_xfer_desc()
591 			imx_dmav1_writel(imxdma, imxdmac->ccr_to_device,  in imxdma_xfer_desc()
716 	imx_dmav1_writel(imxdma, imxdmac->dma_request,  in imxdma_config_write()
720 	imx_dmav1_writel(imxdma, imxdmac->watermark_level *  in imxdma_config_write()
1101 	imx_dmav1_writel(imxdma, DCR_DRST, DMA_DCR);  in imxdma_probe()
1128 	imx_dmav1_writel(imxdma, DCR_DEN, DMA_DCR);  in imxdma_probe()
1131 	imx_dmav1_writel(imxdma, (1 << IMX_DMA_CHANNELS) - 1, DMA_DISR);  in imxdma_probe()
1134 	imx_dmav1_writel(imxdma, (1 << IMX_DMA_CHANNELS) - 1, DMA_DIMR);  in imxdma_probe()