62 	u32 cfglo = 0;  in idma64_chan_init()  local
65 	cfglo |= IDMA64C_CFGL_DST_BURST_ALIGN | IDMA64C_CFGL_SRC_BURST_ALIGN;  in idma64_chan_init()
67 	channel_writel(idma64c, CFG_LO, cfglo);  in idma64_chan_init()
417 	u32 cfglo;  in idma64_chan_deactivate()  local
419 	cfglo = channel_readl(idma64c, CFG_LO);  in idma64_chan_deactivate()
421 		cfglo |= IDMA64C_CFGL_CH_DRAIN;  in idma64_chan_deactivate()
423 		cfglo &= ~IDMA64C_CFGL_CH_DRAIN;  in idma64_chan_deactivate()
425 	channel_writel(idma64c, CFG_LO, cfglo | IDMA64C_CFGL_CH_SUSP);  in idma64_chan_deactivate()
428 		cfglo = channel_readl(idma64c, CFG_LO);  in idma64_chan_deactivate()
429 	} while (!(cfglo & IDMA64C_CFGL_FIFO_EMPTY) && --count);  in idma64_chan_deactivate()
434 	u32 cfglo;  in idma64_chan_activate()  local
436 	cfglo = channel_readl(idma64c, CFG_LO);  in idma64_chan_activate()
437 	channel_writel(idma64c, CFG_LO, cfglo & ~IDMA64C_CFGL_CH_SUSP);  in idma64_chan_activate()