Lines Matching refs:ddr_psci_param
101 static struct share_params *ddr_psci_param; variable
350 ddr_psci_param->hz = target_rate; in rockchip_ddr_set_rate()
351 ddr_psci_param->lcdc_type = rk_drm_get_lcdc_type(); in rockchip_ddr_set_rate()
352 ddr_psci_param->vop_scan_line_time_ns = rockchip_drm_get_scan_line_time_ns(); in rockchip_ddr_set_rate()
353 ddr_psci_param->wait_flag1 = 1; in rockchip_ddr_set_rate()
354 ddr_psci_param->wait_flag0 = 1; in rockchip_ddr_set_rate()
1083 ddr_psci_param->sr_idle_en = en; in rockchip_ddr_set_auto_self_refresh()
1189 if (ddr_psci_param->freq_count == 0 || ddr_psci_param->freq_count > 6) { in rockchip_get_freq_info()
1194 for (i = 0; i < ddr_psci_param->freq_count; i++) in rockchip_get_freq_info()
1195 dmcfreq->freq_info_rate[i] = ddr_psci_param->freq_info_mhz[i] * 1000000; in rockchip_get_freq_info()
1196 dmcfreq->freq_count = ddr_psci_param->freq_count; in rockchip_get_freq_info()
1270 if (ddr_psci_param->freq_count == 0 || ddr_psci_param->freq_count > 6) { in rockchip_dmcfreq_adjust_opp_table()
1275 for (i = 0; i < ddr_psci_param->freq_count; i++) in rockchip_dmcfreq_adjust_opp_table()
1276 dmcfreq->freq_info_rate[i] = ddr_psci_param->freq_info_mhz[i] * 1000000; in rockchip_dmcfreq_adjust_opp_table()
1277 dmcfreq->freq_count = ddr_psci_param->freq_count; in rockchip_dmcfreq_adjust_opp_table()
1381 ddr_psci_param = (struct share_params *)res.a1; in px30_dmc_init()
1383 (uint32_t *)ddr_psci_param); in px30_dmc_init()
1407 ddr_psci_param->complt_hwirq = complt_hwirq; in px30_dmc_init()
1409 dmcfreq->set_rate_params = ddr_psci_param; in px30_dmc_init()
1455 ddr_psci_param = (struct share_params *)res.a1; in rk1808_dmc_init()
1457 (uint32_t *)ddr_psci_param); in rk1808_dmc_init()
1486 dmcfreq->set_rate_params = ddr_psci_param; in rk1808_dmc_init()
1515 ddr_psci_param = (struct share_params *)res.a1; in rk3128_dmc_init()
1517 (uint32_t *)ddr_psci_param); in rk3128_dmc_init()
1519 ddr_psci_param->hz = 0; in rk3128_dmc_init()
1520 ddr_psci_param->lcdc_type = rk_drm_get_lcdc_type(); in rk3128_dmc_init()
1522 dmcfreq->set_rate_params = ddr_psci_param; in rk3128_dmc_init()
1552 ddr_psci_param = (struct share_params *)res.a1; in rk3228_dmc_init()
1554 (uint32_t *)ddr_psci_param)) in rk3228_dmc_init()
1557 ddr_psci_param->hz = 0; in rk3228_dmc_init()
1559 dmcfreq->set_rate_params = ddr_psci_param; in rk3228_dmc_init()
1645 ddr_psci_param = (struct share_params *)res.a1; in rk3288_dmc_init()
1647 (uint32_t *)ddr_psci_param); in rk3288_dmc_init()
1649 ddr_psci_param->hz = 0; in rk3288_dmc_init()
1650 ddr_psci_param->lcdc_type = rk_drm_get_lcdc_type(); in rk3288_dmc_init()
1652 dmcfreq->set_rate_params = ddr_psci_param; in rk3288_dmc_init()
1697 ddr_psci_param = (struct share_params *)res.a1; in rk3328_dmc_init()
1699 (uint32_t *)ddr_psci_param); in rk3328_dmc_init()
1701 dmcfreq->set_rate_params = ddr_psci_param; in rk3328_dmc_init()
1800 ddr_psci_param = (struct share_params *)res.a1; in rk3528_dmc_init()
1802 memset_io(ddr_psci_param, 0x0, 4096 * 2); in rk3528_dmc_init()
1827 ddr_psci_param->complt_hwirq = complt_hwirq; in rk3528_dmc_init()
1872 ddr_psci_param = (struct share_params *)res.a1; in rk3568_dmc_init()
1874 memset_io(ddr_psci_param, 0x0, 4096 * 2); in rk3568_dmc_init()
1945 ddr_psci_param = (struct share_params *)res.a1; in rk3588_dmc_init()
1947 memset_io(ddr_psci_param, 0x0, 4096 * 2); in rk3588_dmc_init()
1996 if (of_property_read_u32(pdev->dev.of_node, "wait-mode", &ddr_psci_param->wait_mode)) in rk3588_dmc_init()
1997 ddr_psci_param->wait_mode = 0; in rk3588_dmc_init()
2033 ddr_psci_param = (struct share_params *)res.a1; in rv1126_dmc_init()
2035 (uint32_t *)ddr_psci_param); in rv1126_dmc_init()
2065 &ddr_psci_param->update_drv_odt_cfg)) in rv1126_dmc_init()
2066 ddr_psci_param->update_drv_odt_cfg = 0; in rv1126_dmc_init()
2069 &ddr_psci_param->update_deskew_cfg)) in rv1126_dmc_init()
2070 ddr_psci_param->update_deskew_cfg = 0; in rv1126_dmc_init()
2072 dmcfreq->set_rate_params = ddr_psci_param; in rv1126_dmc_init()