43 	void __iomem *reg_base;  member
55 	void __iomem *reg_base = nocp->reg_base;  in rockchip_nocp_enable()  local
57 	writel_relaxed(GLOBAL_EN, reg_base + PROBE_CFGCTL);  in rockchip_nocp_enable()
58 	writel_relaxed(START_EN, reg_base + PROBE_MAINCTL);  in rockchip_nocp_enable()
59 	writel_relaxed(0, reg_base + PROBE_STATPERIOD);  in rockchip_nocp_enable()
60 	writel_relaxed(EVENT_BYTE, reg_base + info->counter0_src);  in rockchip_nocp_enable()
61 	writel_relaxed(EVENT_CHAIN, reg_base + info->counter1_src);  in rockchip_nocp_enable()
62 	writel_relaxed(START_GO, reg_base + PROBE_STATGO);  in rockchip_nocp_enable()
73 	void __iomem *reg_base = nocp->reg_base;  in rockchip_nocp_disable()  local
75 	writel_relaxed(0, reg_base + PROBE_STATGO);  in rockchip_nocp_disable()
76 	writel_relaxed(0, reg_base + PROBE_MAINCTL);  in rockchip_nocp_disable()
77 	writel_relaxed(0, reg_base + PROBE_CFGCTL);  in rockchip_nocp_disable()
78 	writel_relaxed(0, reg_base + info->counter0_src);  in rockchip_nocp_disable()
79 	writel_relaxed(0, reg_base + info->counter1_src);  in rockchip_nocp_disable()
89 	void __iomem *reg_base = nocp->reg_base;  in rockchip_nocp_get_event()  local
95 	counter0 = readl_relaxed(reg_base + info->counter0_val);  in rockchip_nocp_get_event()
96 	counter1 = readl_relaxed(reg_base + info->counter1_val);  in rockchip_nocp_get_event()
102 	writel_relaxed(START_GO, reg_base + PROBE_STATGO);  in rockchip_nocp_get_event()
175 	nocp->reg_base = devm_ioremap_resource(&pdev->dev, res);  in rockchip_nocp_probe()
176 	if (IS_ERR(nocp->reg_base))  in rockchip_nocp_probe()
177 		return PTR_ERR(nocp->reg_base);  in rockchip_nocp_probe()