3936 			.halg.digestsize = SHA1_DIGEST_SIZE,
3937 			.halg.base = {
3948 			.halg.digestsize = SHA256_DIGEST_SIZE,
3949 			.halg.base = {
3960 			.halg.digestsize = SHA224_DIGEST_SIZE,
3961 			.halg.base = {
3972 			.halg.digestsize = SHA384_DIGEST_SIZE,
3973 			.halg.base = {
3984 			.halg.digestsize = SHA512_DIGEST_SIZE,
3985 			.halg.base = {
3997 			.halg.digestsize = SHA1_DIGEST_SIZE,
3998 			.halg.base = {
4009 			.halg.digestsize = SHA224_DIGEST_SIZE,
4010 			.halg.base = {
4021 			.halg.digestsize = SHA256_DIGEST_SIZE,
4022 			.halg.base = {
4033 			.halg.digestsize = SHA384_DIGEST_SIZE,
4034 			.halg.base = {
4045 			.halg.digestsize = SHA512_DIGEST_SIZE,
4046 			.halg.base = {
4414 			    &driver_algs[i].alg.hash.halg.base.cra_refcnt)  in chcr_unregister_alg()
4480 			a_hash->halg.statesize = SZ_AHASH_REQ_CTX;  in chcr_register_alg()
4481 			a_hash->halg.base.cra_priority = CHCR_CRA_PRIORITY;  in chcr_register_alg()
4482 			a_hash->halg.base.cra_module = THIS_MODULE;  in chcr_register_alg()
4483 			a_hash->halg.base.cra_flags =  in chcr_register_alg()
4485 			a_hash->halg.base.cra_alignmask = 0;  in chcr_register_alg()
4486 			a_hash->halg.base.cra_exit = NULL;  in chcr_register_alg()
4489 				a_hash->halg.base.cra_init = chcr_hmac_cra_init;  in chcr_register_alg()
4490 				a_hash->halg.base.cra_exit = chcr_hmac_cra_exit;  in chcr_register_alg()
4493 				a_hash->halg.base.cra_ctxsize = SZ_AHASH_H_CTX;  in chcr_register_alg()
4496 				a_hash->halg.base.cra_ctxsize = SZ_AHASH_CTX;  in chcr_register_alg()
4497 				a_hash->halg.base.cra_init = chcr_sha_cra_init;  in chcr_register_alg()
4500 			ai = driver_algs[i].alg.hash.halg.base;  in chcr_register_alg()