Lines Matching defs:caam_deco
935 struct caam_deco { struct
936 u32 rsvd1;
937 u32 cls1_mode; /* CxC1MR - Class 1 Mode */
938 u32 rsvd2;
939 u32 cls1_keysize; /* CxC1KSR - Class 1 Key Size */
940 u32 cls1_datasize_hi; /* CxC1DSR - Class 1 Data Size */
941 u32 cls1_datasize_lo;
942 u32 rsvd3;
943 u32 cls1_icvsize; /* CxC1ICVSR - Class 1 ICV size */
944 u32 rsvd4[5];
945 u32 cha_ctrl; /* CCTLR - CHA control */
946 u32 rsvd5;
947 u32 irq_crtl; /* CxCIRQ - CCB interrupt done/error/clear */
948 u32 rsvd6;
949 u32 clr_written; /* CxCWR - Clear-Written */
950 u32 ccb_status_hi; /* CxCSTA - CCB Status/Error */
951 u32 ccb_status_lo;
952 u32 rsvd7[3];
953 u32 aad_size; /* CxAADSZR - Current AAD Size */
954 u32 rsvd8;
955 u32 cls1_iv_size; /* CxC1IVSZR - Current Class 1 IV Size */
956 u32 rsvd9[7];
957 u32 pkha_a_size; /* PKASZRx - Size of PKHA A */
958 u32 rsvd10;
959 u32 pkha_b_size; /* PKBSZRx - Size of PKHA B */
960 u32 rsvd11;
961 u32 pkha_n_size; /* PKNSZRx - Size of PKHA N */
962 u32 rsvd12;
963 u32 pkha_e_size; /* PKESZRx - Size of PKHA E */
964 u32 rsvd13[24];
965 u32 cls1_ctx[16]; /* CxC1CTXR - Class 1 Context @100 */
966 u32 rsvd14[48];
967 u32 cls1_key[8]; /* CxC1KEYR - Class 1 Key @200 */
968 u32 rsvd15[121];
969 u32 cls2_mode; /* CxC2MR - Class 2 Mode */
970 u32 rsvd16;
971 u32 cls2_keysize; /* CxX2KSR - Class 2 Key Size */
972 u32 cls2_datasize_hi; /* CxC2DSR - Class 2 Data Size */
973 u32 cls2_datasize_lo;
974 u32 rsvd17;
975 u32 cls2_icvsize; /* CxC2ICVSZR - Class 2 ICV Size */
976 u32 rsvd18[56];
977 u32 cls2_ctx[18]; /* CxC2CTXR - Class 2 Context @500 */
978 u32 rsvd19[46];
979 u32 cls2_key[32]; /* CxC2KEYR - Class2 Key @600 */
980 u32 rsvd20[84];
981 u32 inp_infofifo_hi; /* CxIFIFO - Input Info FIFO @7d0 */
982 u32 inp_infofifo_lo;
983 u32 rsvd21[2];
984 u64 inp_datafifo; /* CxDFIFO - Input Data FIFO */
985 u32 rsvd22[2];
986 u64 out_datafifo; /* CxOFIFO - Output Data FIFO */
987 u32 rsvd23[2];
988 u32 jr_ctl_hi; /* CxJRR - JobR Control Register @800 */
989 u32 jr_ctl_lo;
990 u64 jr_descaddr; /* CxDADR - JobR Descriptor Address */
992 u32 op_status_hi; /* DxOPSTA - DECO Operation Status */
993 u32 op_status_lo;
994 u32 rsvd24[2];
995 u32 liodn; /* DxLSR - DECO LIODN Status - non-seq */
996 u32 td_liodn; /* DxLSR - DECO LIODN Status - trustdesc */
997 u32 rsvd26[6];
998 u64 math[4]; /* DxMTH - Math register */
999 u32 rsvd27[8];
1000 struct deco_sg_table gthr_tbl[4]; /* DxGTR - Gather Tables */
1001 u32 rsvd28[16];
1002 struct deco_sg_table sctr_tbl[4]; /* DxSTR - Scatter Tables */
1003 u32 rsvd29[48];
1004 u32 descbuf[64]; /* DxDESB - Descriptor buffer */
1005 u32 rscvd30[193];
1009 u32 desc_dbg; /* DxDDR - DECO Debug Register */
1010 u32 rsvd31[13];
1013 u32 dbg_exec; /* DxDER - DECO Debug Exec Register */
1014 u32 rsvd32[112];