Lines Matching +full:inside +full:- +full:secure
1 # SPDX-License-Identifier: GPL-2.0-only
39 called padlock-aes.
53 called padlock-sha.
61 Say 'Y' here to use the AMD Geode LX processor on-board AES
65 will be called geode-aes.
118 Please note that creation of protected keys from secure keys
142 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
152 SHA256 secure hash standard (DFIPS 180-2).
162 SHA512 secure hash standard.
172 SHA3_256 secure hash standard.
182 SHA3_512 secure hash standard.
194 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
206 AES cipher algorithms (FIPS-197).
223 and uses triple-DES to generate secure random numbers like the
224 ANSI X9.17 standard. User-space programs access the
225 pseudo-random-number device through the char device /dev/prandom.
240 tristate "CRC-32 algorithms"
247 can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
248 and CRC-32C (Castagnoli).
264 sub-units. One set provides the Modular Arithmetic Unit,
354 This option provides the kernel-side support for the TRNG hardware
441 This driver provides kernel-side support through the
446 module will be called exynos-rng.
471 needed for small and zero-size messages.
489 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
492 Driver for ST-Ericsson UX500 crypto engine.
522 will be called atmel-aes.
535 will be called atmel-tdes.
548 will be called atmel-sha.
566 will be called atmel-ecc.
581 will be called atmel-sha204a.
584 bool "Support for AMD Secure Processor"
587 The AMD Secure Processor provides support for the Cryptographic Coprocessor
605 co-processor on the die.
608 will be called mxs-dcp.
654 (default), hashes-only, or skciphers-only.
657 multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the
661 algorithms, sharing the load with the CPU. Enabling skciphers-only
670 - AES (CBC, CTR, ECB, XTS)
671 - 3DES (CBC, ECB)
672 - DES (CBC, ECB)
673 - SHA1, HMAC-SHA1
674 - SHA256, HMAC-SHA256
677 bool "Symmetric-key ciphers only"
680 Enable symmetric-key ciphers only:
681 - AES (CBC, CTR, ECB, XTS)
682 - 3DES (ECB, CBC)
683 - DES (ECB, CBC)
690 - SHA1, HMAC-SHA1
691 - SHA256, HMAC-SHA256
705 Considering the 256-bit ciphers, software is 2-3 times faster than
706 qce at 256-bytes, 30% faster at 512, and about even at 768-bytes.
707 With 128-bit keys, the break-even point would be around 1024-bytes.
710 cost in CPU usage. The minimum recommended setting is 16-bytes
711 (1 AES block), since AES-GCM will fail if you set it lower.
714 Note that 192-bit keys are not supported by the hardware and are
727 module will be called qcom-rng. If unsure, say N.
785 Xilinx ZynqMP has AES-GCM engine used for symmetric key
822 Secure Processing Unit (SPU). The SPU driver registers skcipher,
828 tristate "Inside Secure's SafeXcel cryptographic engine driver"
843 This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic
844 engines designed by Inside Secure. It currently accelerates DES, 3DES and
847 Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations.
850 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
863 Enables the driver for the on-chip crypto accelerator