Lines Matching +full:nvmem +full:- +full:cell +full:- +full:names
25 #include <linux/nvmem-consumer.h>
38 #include "cpufreq-dt.h"
39 #include "rockchip-cpufreq.h"
66 if (of_property_match_string(np, "nvmem-cell-names", in px30_get_soc_info()
90 if (of_property_match_string(np, "nvmem-cell-names", "special") >= 0) { in rk3288_get_soc_info()
103 name = "performance-w"; in rk3288_get_soc_info()
107 if (of_property_match_string(np, "nvmem-cell-names", name) >= 0) { in rk3288_get_soc_info()
124 if (of_property_match_string(np, "nvmem-cell-names", in rk3288_get_soc_info()
150 if (of_property_match_string(np, "nvmem-cell-names", in rk3399_get_soc_info()
164 if (of_property_match_string(np, "nvmem-cell-names", in rk3399_get_soc_info()
199 if (of_property_match_string(np, "nvmem-cell-names", in rk3588_get_soc_info()
239 if (of_property_read_u32(np, "rockchip,pvtm-low-len-sel", in rk3588_change_length()
265 if (!of_property_read_bool(np, "rockchip,supported-hw")) in rk3588_set_supported_hw()
299 if (!opp_info->volt_rm_tbl) in rk3588_cpu_set_read_margin()
301 if (rm == opp_info->current_rm || rm == UINT_MAX) in rk3588_cpu_set_read_margin()
305 if (opp_info->grf) { in rk3588_cpu_set_read_margin()
306 regmap_write(opp_info->grf, 0x20, 0x001c0000 | (rm << 2)); in rk3588_cpu_set_read_margin()
307 regmap_write(opp_info->grf, 0x28, 0x003c0000 | (rm << 2)); in rk3588_cpu_set_read_margin()
308 regmap_write(opp_info->grf, 0x2c, 0x003c0000 | (rm << 2)); in rk3588_cpu_set_read_margin()
309 regmap_write(opp_info->grf, 0x30, 0x00200020); in rk3588_cpu_set_read_margin()
311 regmap_write(opp_info->grf, 0x30, 0x00200000); in rk3588_cpu_set_read_margin()
313 if (opp_info->dsu_grf) { in rk3588_cpu_set_read_margin()
314 regmap_write(opp_info->dsu_grf, 0x20, 0x001c0000 | (rm << 2)); in rk3588_cpu_set_read_margin()
315 regmap_write(opp_info->dsu_grf, 0x28, 0x003c0000 | (rm << 2)); in rk3588_cpu_set_read_margin()
316 regmap_write(opp_info->dsu_grf, 0x2c, 0x003c0000 | (rm << 2)); in rk3588_cpu_set_read_margin()
317 regmap_write(opp_info->dsu_grf, 0x30, 0x001c0000 | (rm << 2)); in rk3588_cpu_set_read_margin()
318 regmap_write(opp_info->dsu_grf, 0x38, 0x001c0000 | (rm << 2)); in rk3588_cpu_set_read_margin()
319 regmap_write(opp_info->dsu_grf, 0x18, 0x40004000); in rk3588_cpu_set_read_margin()
321 regmap_write(opp_info->dsu_grf, 0x18, 0x40000000); in rk3588_cpu_set_read_margin()
324 opp_info->current_rm = rm; in rk3588_cpu_set_read_margin()
335 if (of_property_match_string(np, "nvmem-cell-names", "performance") >= 0) { in rv1126_get_soc_info()
415 if (cpumask_test_cpu(cpu, &cluster->cpus)) in rockchip_cluster_info_lookup()
430 supply->u_volt_min, supply->u_volt, supply->u_volt_max); in rockchip_cpufreq_set_volt()
432 ret = regulator_set_voltage_triplet(reg, supply->u_volt_min, in rockchip_cpufreq_set_volt()
433 supply->u_volt, supply->u_volt_max); in rockchip_cpufreq_set_volt()
436 __func__, supply->u_volt_min, supply->u_volt, in rockchip_cpufreq_set_volt()
437 supply->u_volt_max, ret); in rockchip_cpufreq_set_volt()
444 struct dev_pm_opp_supply *old_supply_vdd = &data->old_opp.supplies[0]; in cpu_opp_helper()
445 struct dev_pm_opp_supply *old_supply_mem = &data->old_opp.supplies[1]; in cpu_opp_helper()
446 struct dev_pm_opp_supply *new_supply_vdd = &data->new_opp.supplies[0]; in cpu_opp_helper()
447 struct dev_pm_opp_supply *new_supply_mem = &data->new_opp.supplies[1]; in cpu_opp_helper()
448 struct regulator *vdd_reg = data->regulators[0]; in cpu_opp_helper()
449 struct regulator *mem_reg = data->regulators[1]; in cpu_opp_helper()
450 struct device *dev = data->dev; in cpu_opp_helper()
451 struct clk *clk = data->clk; in cpu_opp_helper()
454 unsigned long old_freq = data->old_opp.rate; in cpu_opp_helper()
455 unsigned long new_freq = data->new_opp.rate; in cpu_opp_helper()
459 cluster = rockchip_cluster_info_lookup(dev->id); in cpu_opp_helper()
461 return -EINVAL; in cpu_opp_helper()
462 opp_info = &cluster->opp_info; in cpu_opp_helper()
463 rockchip_get_read_margin(dev, opp_info, new_supply_vdd->u_volt, in cpu_opp_helper()
467 dev_dbg(dev, "%s: switching OPP: %lu Hz --> %lu Hz\n", __func__, in cpu_opp_helper()
477 return -EINVAL; in cpu_opp_helper()
502 return -EINVAL; in cpu_opp_helper()
521 cluster->volt = new_supply_vdd->u_volt; in cpu_opp_helper()
522 cluster->mem_volt = new_supply_mem->u_volt; in cpu_opp_helper()
528 dev_err(dev, "%s: failed to restore old-freq (%lu Hz)\n", in cpu_opp_helper()
531 rockchip_get_read_margin(dev, opp_info, old_supply_vdd->u_volt, in cpu_opp_helper()
543 struct rockchip_opp_info *opp_info = &cluster->opp_info; in rockchip_cpufreq_cluster_init()
551 int bin = -EINVAL; in rockchip_cpufreq_cluster_init()
552 int process = -EINVAL; in rockchip_cpufreq_cluster_init()
553 int volt_sel = -EINVAL; in rockchip_cpufreq_cluster_init()
559 return -ENODEV; in rockchip_cpufreq_cluster_init()
561 opp_info->dev = dev; in rockchip_cpufreq_cluster_init()
563 if (of_find_property(dev->of_node, "cpu-supply", NULL)) in rockchip_cpufreq_cluster_init()
565 else if (of_find_property(dev->of_node, "cpu0-supply", NULL)) in rockchip_cpufreq_cluster_init()
568 return -ENOENT; in rockchip_cpufreq_cluster_init()
570 np = of_parse_phandle(dev->of_node, "operating-points-v2", 0); in rockchip_cpufreq_cluster_init()
572 dev_warn(dev, "OPP-v2 not supported\n"); in rockchip_cpufreq_cluster_init()
573 return -ENOENT; in rockchip_cpufreq_cluster_init()
576 opp_info->grf = syscon_regmap_lookup_by_phandle(np, in rockchip_cpufreq_cluster_init()
578 if (IS_ERR(opp_info->grf)) in rockchip_cpufreq_cluster_init()
579 opp_info->grf = NULL; in rockchip_cpufreq_cluster_init()
581 ret = dev_pm_opp_of_get_sharing_cpus(dev, &cluster->cpus); in rockchip_cpufreq_cluster_init()
587 cluster->is_opp_shared_dsu = of_property_read_bool(np, "rockchip,opp-shared-dsu"); in rockchip_cpufreq_cluster_init()
588 if (!of_property_read_u32(np, "rockchip,idle-threshold-freq", &freq)) in rockchip_cpufreq_cluster_init()
589 cluster->idle_threshold_freq = freq; in rockchip_cpufreq_cluster_init()
591 if (opp_info->data && opp_info->data->set_read_margin) { in rockchip_cpufreq_cluster_init()
592 opp_info->current_rm = UINT_MAX; in rockchip_cpufreq_cluster_init()
593 opp_info->target_rm = UINT_MAX; in rockchip_cpufreq_cluster_init()
594 opp_info->dsu_grf = in rockchip_cpufreq_cluster_init()
595 syscon_regmap_lookup_by_phandle(np, "rockchip,dsu-grf"); in rockchip_cpufreq_cluster_init()
596 if (IS_ERR(opp_info->dsu_grf)) in rockchip_cpufreq_cluster_init()
597 opp_info->dsu_grf = NULL; in rockchip_cpufreq_cluster_init()
598 rockchip_get_volt_rm_table(dev, np, "volt-mem-read-margin", in rockchip_cpufreq_cluster_init()
599 &opp_info->volt_rm_tbl); in rockchip_cpufreq_cluster_init()
600 of_property_read_u32(np, "low-volt-mem-read-margin", in rockchip_cpufreq_cluster_init()
601 &opp_info->low_rm); in rockchip_cpufreq_cluster_init()
602 if (!of_property_read_u32(np, "intermediate-threshold-freq", &freq)) in rockchip_cpufreq_cluster_init()
603 opp_info->intermediate_threshold_freq = freq * 1000; in rockchip_cpufreq_cluster_init()
606 if (opp_info->data && opp_info->data->get_soc_info) in rockchip_cpufreq_cluster_init()
607 opp_info->data->get_soc_info(dev, np, &bin, &process); in rockchip_cpufreq_cluster_init()
609 &cluster->scale, &volt_sel); in rockchip_cpufreq_cluster_init()
610 if (opp_info->data && opp_info->data->set_soc_info) in rockchip_cpufreq_cluster_init()
611 opp_info->data->set_soc_info(dev, np, bin, process, volt_sel); in rockchip_cpufreq_cluster_init()
614 if (of_find_property(dev->of_node, "cpu-supply", NULL) && in rockchip_cpufreq_cluster_init()
615 of_find_property(dev->of_node, "mem-supply", NULL)) { in rockchip_cpufreq_cluster_init()
616 cluster->regulator_count = 2; in rockchip_cpufreq_cluster_init()
630 cluster->regulator_count = 1; in rockchip_cpufreq_cluster_init()
653 cluster = rockchip_cluster_info_lookup(dev->id); in rockchip_cpufreq_adjust_power_scale()
655 return -EINVAL; in rockchip_cpufreq_adjust_power_scale()
656 rockchip_adjust_power_scale(dev, cluster->scale); in rockchip_cpufreq_adjust_power_scale()
657 rockchip_pvtpll_calibrate_opp(&cluster->opp_info); in rockchip_cpufreq_adjust_power_scale()
658 rockchip_pvtpll_add_length(&cluster->opp_info); in rockchip_cpufreq_adjust_power_scale()
671 cluster = rockchip_cluster_info_lookup(dev->id); in rockchip_cpufreq_opp_set_rate()
673 return -EINVAL; in rockchip_cpufreq_opp_set_rate()
675 rockchip_monitor_volt_adjust_lock(cluster->mdev_info); in rockchip_cpufreq_opp_set_rate()
678 cluster->rate = target_freq; in rockchip_cpufreq_opp_set_rate()
679 if (cluster->regulator_count == 1) { in rockchip_cpufreq_opp_set_rate()
681 opp = dev_pm_opp_find_freq_ceil(cluster->opp_info.dev, &freq); in rockchip_cpufreq_opp_set_rate()
683 cluster->volt = dev_pm_opp_get_voltage(opp); in rockchip_cpufreq_opp_set_rate()
688 rockchip_monitor_volt_adjust_unlock(cluster->mdev_info); in rockchip_cpufreq_opp_set_rate()
700 rockchip_monitor_suspend_low_temp_adjust(policy->cpu); in rockchip_cpufreq_suspend()
708 struct device *dev = cluster->opp_info.dev; in rockchip_cpufreq_add_monitor()
714 return -ENOMEM; in rockchip_cpufreq_add_monitor()
716 mdevp->type = MONITOR_TYPE_CPU; in rockchip_cpufreq_add_monitor()
717 mdevp->low_temp_adjust = rockchip_monitor_cpu_low_temp_adjust; in rockchip_cpufreq_add_monitor()
718 mdevp->high_temp_adjust = rockchip_monitor_cpu_high_temp_adjust; in rockchip_cpufreq_add_monitor()
719 mdevp->update_volt = rockchip_monitor_check_rate_volt; in rockchip_cpufreq_add_monitor()
720 mdevp->data = (void *)policy; in rockchip_cpufreq_add_monitor()
721 mdevp->opp_info = &cluster->opp_info; in rockchip_cpufreq_add_monitor()
722 cpumask_copy(&mdevp->allowed_cpus, policy->cpus); in rockchip_cpufreq_add_monitor()
727 return -EINVAL; in rockchip_cpufreq_add_monitor()
729 mdev_info->devp = mdevp; in rockchip_cpufreq_add_monitor()
730 cluster->mdev_info = mdev_info; in rockchip_cpufreq_add_monitor()
737 if (cluster->mdev_info) { in rockchip_cpufreq_remove_monitor()
738 kfree(cluster->mdev_info->devp); in rockchip_cpufreq_remove_monitor()
739 rockchip_system_monitor_unregister(cluster->mdev_info); in rockchip_cpufreq_remove_monitor()
740 cluster->mdev_info = NULL; in rockchip_cpufreq_remove_monitor()
750 if (!cluster->is_opp_shared_dsu) in rockchip_cpufreq_remove_dsu_qos()
754 if (ci->is_opp_shared_dsu) in rockchip_cpufreq_remove_dsu_qos()
756 if (freq_qos_request_active(&ci->dsu_qos_req)) in rockchip_cpufreq_remove_dsu_qos()
757 freq_qos_remove_request(&ci->dsu_qos_req); in rockchip_cpufreq_remove_dsu_qos()
766 struct device *dev = cluster->opp_info.dev; in rockchip_cpufreq_add_dsu_qos_req()
770 if (!cluster->is_opp_shared_dsu) in rockchip_cpufreq_add_dsu_qos_req()
774 if (ci->is_opp_shared_dsu) in rockchip_cpufreq_add_dsu_qos_req()
776 ret = freq_qos_add_request(&policy->constraints, in rockchip_cpufreq_add_dsu_qos_req()
777 &ci->dsu_qos_req, in rockchip_cpufreq_add_dsu_qos_req()
800 cluster = rockchip_cluster_info_lookup(policy->cpu); in rockchip_cpufreq_notifier()
836 if (--idle_disable_refcnt == 0) in rockchip_cpufreq_idle_state_disable()
857 if (index >= drv->state_count) in rockchip_cpufreq_idle_state_disable()
880 struct device *dev = cluster->opp_info.dev; in rockchip_cpufreq_update_dsu_req()
883 if (cluster->is_opp_shared_dsu || in rockchip_cpufreq_update_dsu_req()
884 !freq_qos_request_active(&cluster->dsu_qos_req)) in rockchip_cpufreq_update_dsu_req()
887 dev_dbg(dev, "cpu to dsu: %u -> %u\n", freq, dsu_freq); in rockchip_cpufreq_update_dsu_req()
889 return freq_qos_update_request(&cluster->dsu_qos_req, dsu_freq); in rockchip_cpufreq_update_dsu_req()
896 struct cpufreq_policy *policy = freqs->policy; in rockchip_cpufreq_transition_notifier()
899 cluster = rockchip_cluster_info_lookup(policy->cpu); in rockchip_cpufreq_transition_notifier()
904 if (cluster->idle_threshold_freq && in rockchip_cpufreq_transition_notifier()
905 freqs->new >= cluster->idle_threshold_freq && in rockchip_cpufreq_transition_notifier()
906 !cluster->is_idle_disabled) { in rockchip_cpufreq_transition_notifier()
907 rockchip_cpufreq_idle_state_disable(policy->cpus, 1, in rockchip_cpufreq_transition_notifier()
909 cluster->is_idle_disabled = true; in rockchip_cpufreq_transition_notifier()
912 if (cluster->idle_threshold_freq && in rockchip_cpufreq_transition_notifier()
913 freqs->new < cluster->idle_threshold_freq && in rockchip_cpufreq_transition_notifier()
914 cluster->is_idle_disabled) { in rockchip_cpufreq_transition_notifier()
915 rockchip_cpufreq_idle_state_disable(policy->cpus, 1, in rockchip_cpufreq_transition_notifier()
917 cluster->is_idle_disabled = false; in rockchip_cpufreq_transition_notifier()
919 rockchip_cpufreq_update_dsu_req(cluster, freqs->new); in rockchip_cpufreq_transition_notifier()
936 dev = ci->opp_info.dev; in rockchip_cpufreq_panic_notifier()
938 if (ci->regulator_count == 1) in rockchip_cpufreq_panic_notifier()
940 ci->rate, ci->volt); in rockchip_cpufreq_panic_notifier()
943 ci->rate, ci->volt, ci->mem_volt); in rockchip_cpufreq_panic_notifier()
966 ret = -ENOMEM; in rockchip_cpufreq_driver_init()
975 list_add(&cluster->list_head, &cluster_info_list); in rockchip_cpufreq_driver_init()
1007 return PTR_ERR_OR_ZERO(platform_device_register_data(NULL, "cpufreq-dt", in rockchip_cpufreq_driver_init()
1008 -1, (void *)&pdata, in rockchip_cpufreq_driver_init()
1013 list_del(&cluster->list_head); in rockchip_cpufreq_driver_init()
1020 MODULE_AUTHOR("Finley Xiao <finley.xiao@rock-chips.com>");