352 	u64 tsc_msr;  in suspend_hv_clock_tsc()  local
355 	hv_get_reference_tsc(tsc_msr);  in suspend_hv_clock_tsc()
356 	tsc_msr &= ~BIT_ULL(0);  in suspend_hv_clock_tsc()
357 	hv_set_reference_tsc(tsc_msr);  in suspend_hv_clock_tsc()
364 	u64 tsc_msr;  in resume_hv_clock_tsc()  local
367 	hv_get_reference_tsc(tsc_msr);  in resume_hv_clock_tsc()
368 	tsc_msr &= GENMASK_ULL(11, 0);  in resume_hv_clock_tsc()
369 	tsc_msr |= BIT_ULL(0) | (u64)phys_addr;  in resume_hv_clock_tsc()
370 	hv_set_reference_tsc(tsc_msr);  in resume_hv_clock_tsc()
423 	u64		tsc_msr;  in hv_init_tsc_clocksource()  local
439 	hv_get_reference_tsc(tsc_msr);  in hv_init_tsc_clocksource()
440 	tsc_msr &= GENMASK_ULL(11, 0);  in hv_init_tsc_clocksource()
441 	tsc_msr = tsc_msr | 0x1 | (u64)phys_addr;  in hv_init_tsc_clocksource()
442 	hv_set_reference_tsc(tsc_msr);  in hv_init_tsc_clocksource()