19 #include <linux/clk.h>
20 #include <linux/clk-provider.h>
27 #include <linux/clk/ti.h>
47 	struct clk *clk;  member
72 	__raw_writel(val, cinfo->iobase + reg);  in atl_write()
77 	return __raw_readl(cinfo->iobase + reg);  in atl_read()
84 	if (!cdesc->probed)  in atl_clk_enable()
85 		goto out;  in atl_clk_enable()
87 	if (unlikely(!cdesc->valid))  in atl_clk_enable()
88 		dev_warn(cdesc->cinfo->dev, "atl%d has not been configured\n",  in atl_clk_enable()
89 			 cdesc->id);  in atl_clk_enable()
90 	pm_runtime_get_sync(cdesc->cinfo->dev);  in atl_clk_enable()
92 	atl_write(cdesc->cinfo, DRA7_ATL_ATLCR_REG(cdesc->id),  in atl_clk_enable()
93 		  cdesc->divider - 1);  in atl_clk_enable()
94 	atl_write(cdesc->cinfo, DRA7_ATL_SWEN_REG(cdesc->id), DRA7_ATL_SWEN);  in atl_clk_enable()
96 out:  in atl_clk_enable()
97 	cdesc->enabled = true;  in atl_clk_enable()
106 	if (!cdesc->probed)  in atl_clk_disable()
107 		goto out;  in atl_clk_disable()
109 	atl_write(cdesc->cinfo, DRA7_ATL_SWEN_REG(cdesc->id), 0);  in atl_clk_disable()
110 	pm_runtime_put_sync(cdesc->cinfo->dev);  in atl_clk_disable()
112 out:  in atl_clk_disable()
113 	cdesc->enabled = false;  in atl_clk_disable()
120 	return cdesc->enabled;  in atl_clk_is_enabled()
128 	return parent_rate / cdesc->divider;  in atl_clk_recalc_rate()
150 		return -EINVAL;  in atl_clk_set_rate()
153 	divider = ((parent_rate + rate / 2) / rate) - 1;  in atl_clk_set_rate()
157 	cdesc->divider = divider + 1;  in atl_clk_set_rate()
176 	struct clk *clk;  in of_dra7_atl_clock_setup()  local
184 	clk_hw->hw.init = &init;  in of_dra7_atl_clock_setup()
185 	clk_hw->divider = 1;  in of_dra7_atl_clock_setup()
186 	init.name = node->name;  in of_dra7_atl_clock_setup()
206 	clk = ti_clk_register(NULL, &clk_hw->hw, node->name);  in of_dra7_atl_clock_setup()
208 	if (!IS_ERR(clk)) {  in of_dra7_atl_clock_setup()
209 		of_clk_add_provider(node, of_clk_src_simple_get, clk);  in of_dra7_atl_clock_setup()
217 CLK_OF_DECLARE(dra7_atl_clock, "ti,dra7-atl-clock", of_dra7_atl_clock_setup);
221 	struct device_node *node = pdev->dev.of_node;  in of_dra7_atl_clk_probe()
227 		return -ENODEV;  in of_dra7_atl_clk_probe()
229 	cinfo = devm_kzalloc(&pdev->dev, sizeof(*cinfo), GFP_KERNEL);  in of_dra7_atl_clk_probe()
231 		return -ENOMEM;  in of_dra7_atl_clk_probe()
233 	cinfo->iobase = of_iomap(node, 0);  in of_dra7_atl_clk_probe()
234 	cinfo->dev = &pdev->dev;  in of_dra7_atl_clk_probe()
235 	pm_runtime_enable(cinfo->dev);  in of_dra7_atl_clk_probe()
237 	pm_runtime_get_sync(cinfo->dev);  in of_dra7_atl_clk_probe()
245 		struct clk *clk;  in of_dra7_atl_clk_probe()  local
248 		rc = of_parse_phandle_with_args(node, "ti,provided-clocks",  in of_dra7_atl_clk_probe()
254 			ret = -EINVAL;  in of_dra7_atl_clk_probe()
258 		clk = of_clk_get_from_provider(&clkspec);  in of_dra7_atl_clk_probe()
259 		if (IS_ERR(clk)) {  in of_dra7_atl_clk_probe()
262 			ret = PTR_ERR(clk);  in of_dra7_atl_clk_probe()
266 		cdesc = to_atl_desc(__clk_get_hw(clk));  in of_dra7_atl_clk_probe()
267 		cdesc->cinfo = cinfo;  in of_dra7_atl_clk_probe()
268 		cdesc->id = i;  in of_dra7_atl_clk_probe()
275 						   &cdesc->bws);  in of_dra7_atl_clk_probe()
277 						    &cdesc->aws);  in of_dra7_atl_clk_probe()
279 				cdesc->valid = true;  in of_dra7_atl_clk_probe()
281 					  cdesc->bws);  in of_dra7_atl_clk_probe()
283 					  cdesc->aws);  in of_dra7_atl_clk_probe()
288 		cdesc->probed = true;  in of_dra7_atl_clk_probe()
293 		if (cdesc->enabled)  in of_dra7_atl_clk_probe()
294 			atl_clk_enable(__clk_get_hw(clk));  in of_dra7_atl_clk_probe()
298 	pm_runtime_put_sync(cinfo->dev);  in of_dra7_atl_clk_probe()
303 	{ .compatible = "ti,dra7-atl", },
309 		.name = "dra7-atl",