1228 	p = DIV_ROUND_UP(pll->params->vco_min, rate);  in _calc_dynamic_ramp_rate()
1258 static unsigned long _clip_vco_min(unsigned long vco_min,  in _clip_vco_min()  argument
1261 	return DIV_ROUND_UP(vco_min, parent_rate) * parent_rate;  in _clip_vco_min()
2062 	pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate);  in tegra_clk_register_pllxc()
2065 		pll_params->vco_min = pll_params->adjust_vco(pll_params,  in tegra_clk_register_pllxc()
2113 	pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate);  in tegra_clk_register_pllre()
2116 		pll_params->vco_min = pll_params->adjust_vco(pll_params,  in tegra_clk_register_pllre()
2134 		val |= (pll_params->vco_min / parent_rate) << divn_shift(pll);  in tegra_clk_register_pllre()
2174 	pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate);  in tegra_clk_register_pllm()
2177 		pll_params->vco_min = pll_params->adjust_vco(pll_params,  in tegra_clk_register_pllm()
2218 	pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate);  in tegra_clk_register_pllc()
2235 	cfg.n = cfg.m * pll_params->vco_min / parent_rate;  in tegra_clk_register_pllc()
2358 	pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate);  in tegra_clk_register_pllss()
2363 	cfg.n = cfg.m * pll_params->vco_min / parent_rate;  in tegra_clk_register_pllss()
2417 	pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate);  in tegra_clk_register_pllre_tegra210()
2420 		pll_params->vco_min = pll_params->adjust_vco(pll_params,  in tegra_clk_register_pllre_tegra210()
2629 	pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate);  in tegra_clk_register_pllc_tegra210()
2632 		pll_params->vco_min = pll_params->adjust_vco(pll_params,  in tegra_clk_register_pllc_tegra210()
2677 	pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate);  in tegra_clk_register_pllss_tegra210()
2680 		pll_params->vco_min = pll_params->adjust_vco(pll_params,  in tegra_clk_register_pllss_tegra210()
2719 	pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate);  in tegra_clk_register_pllmb()
2722 		pll_params->vco_min = pll_params->adjust_vco(pll_params,  in tegra_clk_register_pllmb()