230 #define pll_readl(offset, p) readl_relaxed(p->clk_base + offset)
237 #define pll_writel(val, offset, p) writel_relaxed(val, p->clk_base + offset)
302 	lock_addr = pll->clk_base;  in clk_pll_wait_for_lock()
999 	val = readl(pll->clk_base + PLLE_SS_CTRL);  in clk_plle_enable()
1002 	writel(val, pll->clk_base + PLLE_SS_CTRL);  in clk_plle_enable()
1159 	value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG2);  in clk_pllu_enable()
1169 	writel_relaxed(value, pll->clk_base + UTMIP_PLL_CFG2);  in clk_pllu_enable()
1171 	value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG1);  in clk_pllu_enable()
1181 	writel_relaxed(value, pll->clk_base + UTMIP_PLL_CFG1);  in clk_pllu_enable()
1265 			       void __iomem *clk_base,  in _setup_dynamic_ramp()  argument
1295 	writel_relaxed(val, clk_base + pll_params->dyn_ramp_reg);  in _setup_dynamic_ramp()
1782 	value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG2);  in clk_pllu_tegra114_enable()
1792 	writel_relaxed(value, pll->clk_base + UTMIP_PLL_CFG2);  in clk_pllu_tegra114_enable()
1794 	value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG1);  in clk_pllu_tegra114_enable()
1805 	writel_relaxed(value, pll->clk_base + UTMIP_PLL_CFG1);  in clk_pllu_tegra114_enable()
1808 	value = readl_relaxed(pll->clk_base + UTMIPLL_HW_PWRDN_CFG0);  in clk_pllu_tegra114_enable()
1812 	writel_relaxed(value, pll->clk_base + UTMIPLL_HW_PWRDN_CFG0);  in clk_pllu_tegra114_enable()
1814 	value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG1);  in clk_pllu_tegra114_enable()
1817 	writel_relaxed(value, pll->clk_base + UTMIP_PLL_CFG1);  in clk_pllu_tegra114_enable()
1825 	value = readl_relaxed(pll->clk_base + UTMIPLL_HW_PWRDN_CFG0);  in clk_pllu_tegra114_enable()
1828 	writel_relaxed(value, pll->clk_base + UTMIPLL_HW_PWRDN_CFG0);  in clk_pllu_tegra114_enable()
1833 	value = readl_relaxed(pll->clk_base + UTMIPLL_HW_PWRDN_CFG0);  in clk_pllu_tegra114_enable()
1835 	writel_relaxed(value, pll->clk_base + UTMIPLL_HW_PWRDN_CFG0);  in clk_pllu_tegra114_enable()
1861 		fence_udelay(1, pll->clk_base);  in _clk_plle_tegra_init_parent()
1866 static struct tegra_clk_pll *_tegra_init_pll(void __iomem *clk_base,  in _tegra_init_pll()  argument
1876 	pll->clk_base = clk_base;  in _tegra_init_pll()
1918 		void __iomem *clk_base, void __iomem *pmc,  in tegra_clk_register_pll()  argument
1927 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);  in tegra_clk_register_pll()
1949 		void __iomem *clk_base, void __iomem *pmc,  in tegra_clk_register_plle()  argument
1961 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);  in tegra_clk_register_plle()
1974 		void __iomem *clk_base, unsigned long flags,  in tegra_clk_register_pllu()  argument
1982 	pll = _tegra_init_pll(clk_base, NULL, pll_params, lock);  in tegra_clk_register_pllu()
2040 			  void __iomem *clk_base, void __iomem *pmc,  in tegra_clk_register_pllxc()  argument
2075 		err = _setup_dynamic_ramp(pll_params, clk_base, parent_rate);  in tegra_clk_register_pllxc()
2079 		val = readl_relaxed(clk_base + pll_params->base_reg);  in tegra_clk_register_pllxc()
2080 		val_iddq = readl_relaxed(clk_base + pll_params->iddq_reg);  in tegra_clk_register_pllxc()
2087 				       clk_base + pll_params->iddq_reg);  in tegra_clk_register_pllxc()
2091 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);  in tegra_clk_register_pllxc()
2104 			  void __iomem *clk_base, void __iomem *pmc,  in tegra_clk_register_pllre()  argument
2119 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);  in tegra_clk_register_pllre()
2127 		WARN_ON(readl_relaxed(clk_base + pll_params->iddq_reg) &  in tegra_clk_register_pllre()
2153 			  void __iomem *clk_base, void __iomem *pmc,  in tegra_clk_register_pllm()  argument
2182 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);  in tegra_clk_register_pllm()
2195 			  void __iomem *clk_base, void __iomem *pmc,  in tegra_clk_register_pllc()  argument
2221 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);  in tegra_clk_register_pllc()
2270 				void __iomem *clk_base, unsigned long flags,  in tegra_clk_register_plle_tegra114()  argument
2277 	pll = _tegra_init_pll(clk_base, NULL, pll_params, lock);  in tegra_clk_register_plle_tegra114()
2293 				 void __iomem *clk_base, unsigned long flags,  in tegra_clk_register_pllu_tegra114()  argument
2302 	pll = _tegra_init_pll(clk_base, NULL, pll_params, lock);  in tegra_clk_register_pllu_tegra114()
2327 				void __iomem *clk_base, unsigned long flags,  in tegra_clk_register_pllss()  argument
2348 	pll = _tegra_init_pll(clk_base, NULL, pll_params, lock);  in tegra_clk_register_pllss()
2382 	val_iddq = readl_relaxed(clk_base + pll_params->iddq_reg);  in tegra_clk_register_pllss()
2391 		writel_relaxed(val_iddq, clk_base + pll_params->iddq_reg);  in tegra_clk_register_pllss()
2409 			  const char *parent_name, void __iomem *clk_base,  in tegra_clk_register_pllre_tegra210()  argument
2423 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);  in tegra_clk_register_pllre_tegra210()
2585 				void __iomem *clk_base, unsigned long flags,  in tegra_clk_register_plle_tegra210()  argument
2592 	pll = _tegra_init_pll(clk_base, NULL, pll_params, lock);  in tegra_clk_register_plle_tegra210()
2607 			const char *parent_name, void __iomem *clk_base,  in tegra_clk_register_pllc_tegra210()  argument
2636 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);  in tegra_clk_register_pllc_tegra210()
2649 				const char *parent_name, void __iomem *clk_base,  in tegra_clk_register_pllss_tegra210()  argument
2669 	val = readl_relaxed(clk_base + pll_params->base_reg);  in tegra_clk_register_pllss_tegra210()
2684 	pll = _tegra_init_pll(clk_base, NULL, pll_params, lock);  in tegra_clk_register_pllss_tegra210()
2698 			  void __iomem *clk_base, void __iomem *pmc,  in tegra_clk_register_pllmb()  argument
2727 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);  in tegra_clk_register_pllmb()