1627 	val = pll_readl(pll->params->aux_reg, pll);  in clk_plle_tegra114_enable()
1630 	pll_writel(val, pll->params->aux_reg, pll);  in clk_plle_tegra114_enable()
1679 	val = pll_readl(pll->params->aux_reg, pll);  in clk_plle_tegra114_enable()
1682 	pll_writel(val, pll->params->aux_reg, pll);  in clk_plle_tegra114_enable()
1685 	pll_writel(val, pll->params->aux_reg, pll);  in clk_plle_tegra114_enable()
1850 	val_aux = pll_readl(pll->params->aux_reg, pll);  in _clk_plle_tegra_init_parent()
1860 		pll_writel(val_aux, pll->params->aux_reg, pll);  in _clk_plle_tegra_init_parent()
2465 	val = pll_readl(pll->params->aux_reg, pll);  in clk_plle_tegra210_enable()
2521 	val = pll_readl(pll->params->aux_reg, pll);  in clk_plle_tegra210_enable()
2524 	pll_writel(val, pll->params->aux_reg, pll);  in clk_plle_tegra210_enable()
2527 	pll_writel(val, pll->params->aux_reg, pll);  in clk_plle_tegra210_enable()
2546 	val = pll_readl(pll->params->aux_reg, pll);  in clk_plle_tegra210_disable()
2554 	val = pll_readl(pll->params->aux_reg, pll);  in clk_plle_tegra210_disable()
2556 	pll_writel(val, pll->params->aux_reg, pll);  in clk_plle_tegra210_disable()