237 #define pll_writel(val, offset, p) writel_relaxed(val, p->clk_base + offset)  argument
238 #define pll_writel_base(val, p) pll_writel(val, p->params->base_reg, p)  argument
239 #define pll_writel_misc(val, p) pll_writel(val, p->params->misc_reg, p)  argument
240 #define pll_override_writel(val, offset, p) writel(val, p->pmc + offset)  argument
241 #define pll_writel_sdm_din(val, p) pll_writel(val, p->params->sdm_din_reg, p)  argument
242 #define pll_writel_sdm_ctrl(val, p) pll_writel(val, p->params->sdm_ctrl_reg, p)  argument
278 	u32 val;  in clk_pll_enable_lock()  local
294 	u32 val, lock_mask;  in clk_pll_wait_for_lock()  local
332 	u32 val = readl_relaxed(pll->pmc + PMC_PLLP_WB0_OVERRIDE);  in pllm_clk_is_gated_by_pmc()  local
341 	u32 val;  in clk_pll_is_enabled()  local
359 	u32 val;  in _clk_pll_enable()  local
392 	u32 val;  in _clk_pll_disable()  local
423 		u32 val = pll_readl(pll->params->ssc_ctrl_reg, pll);  in pll_clk_start_ss()  local
433 		u32 val = pll_readl(pll->params->ssc_ctrl_reg, pll);  in pll_clk_stop_ss()  local
628 	u32 val;  in clk_pll_set_sdm_data()  local
655 	u32 val;  in _update_pll_mnp()  local
692 	u32 val;  in _get_pll_mnp()  local
728 	u32 val;  in _update_pll_cpcon()  local
865 	u32 val;  in clk_pll_recalc_rate()  local
913 	u32 val;  in clk_plle_training()  local
957 	u32 val;  in clk_plle_enable()  local
1017 	u32 val = pll_readl_base(pll);  in clk_plle_recalc_rate()  local
1268 	u32 val;  in _setup_dynamic_ramp()  local
1380 	u32 val;  in _pllcx_strobe()  local
1394 	u32 val;  in clk_pllc_enable()  local
1425 	u32 val;  in _clk_pllc_disable()  local
1452 	u32 val, n_threshold;  in _pllcx_update_dynamic_coef()  local
1610 	u32 val;  in clk_plle_tegra114_enable()  local
1721 	u32 val;  in clk_plle_tegra114_disable()  local
1846 	u32 val, val_aux;  in _clk_plle_tegra_init_parent()  local
2048 	u32 val, val_iddq;  in tegra_clk_register_pllxc()  local
2109 	u32 val;  in tegra_clk_register_pllre()  local
2335 	u32 val, val_iddq;  in tegra_clk_register_pllss()  local
2438 	u32 val;  in clk_plle_tegra210_is_enabled()  local
2449 	u32 val;  in clk_plle_tegra210_enable()  local
2540 	u32 val;  in clk_plle_tegra210_disable()  local
2657 	u32 val;  in tegra_clk_register_pllss_tegra210()  local