46 	struct clkgen_field ndiv;  member
69 	.ndiv		= CLKGEN_FIELD(0x2a4,	C32_NDIV_MASK,		16),
82 	.ndiv		= CLKGEN_FIELD(0x2cc,	C32_NDIV_MASK,		16),
95 	.ndiv		= CLKGEN_FIELD(0x1b0,	C32_NDIV_MASK,		0),
112 	.ndiv		= CLKGEN_FIELD(0x1b0,	C28_NDIV_MASK,		0),
148 	u32 ndiv;  member
158 	unsigned long ndiv;  member
288 			pll->ndiv = n;  in clk_pll3200c32_get_params()
297 	for (pll->cp = 6; pll->ndiv > cp_table[pll->cp-6]; (pll->cp)++)  in clk_pll3200c32_get_params()
309 	*rate = ((2 * (input / 1000) * pll->ndiv) / pll->idf) * 1000;  in clk_pll3200c32_get_rate()
318 	unsigned long ndiv, idf;  in recalc_stm_pll3200c32()  local
324 	ndiv = CLKGEN_READ(pll, ndiv);  in recalc_stm_pll3200c32()
329 		rate = ((2 * (parent_rate/1000) * ndiv) / idf) * 1000;  in recalc_stm_pll3200c32()
351 		 rate, (unsigned int)params.ndiv,  in round_rate_stm_pll3200c32()
373 		 hwrate, (unsigned int)params.ndiv,  in set_rate_stm_pll3200c32()
379 	pll->ndiv = params.ndiv;  in set_rate_stm_pll3200c32()
388 	CLKGEN_WRITE(pll, ndiv, pll->ndiv);  in set_rate_stm_pll3200c32()
447 				pll->ndiv = n;  in clk_pll4600c28_get_params()
465 	*rate = (input / pll->idf) * 2 * pll->ndiv;  in clk_pll4600c28_get_rate()
480 	params.ndiv = CLKGEN_READ(pll, ndiv);  in recalc_stm_pll4600c28()
505 		 rate, (unsigned int)params.ndiv,  in round_rate_stm_pll4600c28()
532 		 hwrate, (unsigned int)params.ndiv,  in set_rate_stm_pll4600c28()
538 	pll->ndiv = params.ndiv;  in set_rate_stm_pll4600c28()
546 	CLKGEN_WRITE(pll, ndiv, pll->ndiv);  in set_rate_stm_pll4600c28()