35 	unsigned long mdiv;  member
58 	struct clkgen_field mdiv[QUADFS_MAX_CHAN];  member
92 	.mdiv	= { CLKGEN_FIELD(0x304, 0x1f, 15),
143 	.mdiv	= { CLKGEN_FIELD(0x2b4, 0x1f, 15),
492 	CLKGEN_WRITE(fs, mdiv[fs->chan], fs->md);  in quadfs_fsynth_program_rate()
577 	res = (P20 * (32 + fs->mdiv) + 32 * fs->pe) * s * ns;  in clk_fs660c32_dig_get_rate()
601 	fs_tmp.mdiv = (unsigned long) m;  in clk_fs660c32_get_pe()
611 		fs->mdiv = m;  in clk_fs660c32_get_pe()
657 		fs_tmp.mdiv = fs->mdiv;  in clk_fs660c32_dig_get_params()
690 	params->mdiv	= CLKGEN_READ(fs, mdiv[fs->chan]);  in quadfs_fsynt_get_hw_value_for_recalc()
702 	if (!params->mdiv && !params->pe && !params->sdiv)  in quadfs_fsynt_get_hw_value_for_recalc()
705 	fs->md = params->mdiv;  in quadfs_fsynt_get_hw_value_for_recalc()
764 		 rate, (unsigned int)params.sdiv, (unsigned int)params.mdiv,  in quadfs_round_rate()
774 	fs->md = params->mdiv;  in quadfs_program_and_enable()