Lines Matching full:vco

9  * VCO-PLL clock implementation
12 #define pr_fmt(fmt) "clk-vco-pll: " fmt
21 * DOC: VCO-PLL clock
23 * VCO and PLL rate are derived from following equations:
26 * vco = (2 * M[15:8] * Fin)/N
29 * vco = (2 * M[15:0] * Fin)/(256 * N)
33 * vco and pll are very closely bound to each other, "vco needs to program:
37 * clk_register_vco_pll() registers instances of both vco & pll.
39 * set_rate to vco. A single rate table exists for both the clocks, which
97 for (*index = 0; *index < pll->vco->rtbl_cnt; (*index)++) { in clk_pll_round_rate_index()
100 *prate = pll_calc_rate(pll->vco->rtbl, vco_parent_rate, *index, in clk_pll_round_rate_index()
131 if (pll->vco->lock) in clk_pll_recalc_rate()
132 spin_lock_irqsave(pll->vco->lock, flags); in clk_pll_recalc_rate()
134 p = readl_relaxed(pll->vco->cfg_reg); in clk_pll_recalc_rate()
136 if (pll->vco->lock) in clk_pll_recalc_rate()
137 spin_unlock_irqrestore(pll->vco->lock, flags); in clk_pll_recalc_rate()
148 struct pll_rate_tbl *rtbl = pll->vco->rtbl; in clk_pll_set_rate()
154 if (pll->vco->lock) in clk_pll_set_rate()
155 spin_lock_irqsave(pll->vco->lock, flags); in clk_pll_set_rate()
157 val = readl_relaxed(pll->vco->cfg_reg); in clk_pll_set_rate()
160 writel_relaxed(val, pll->vco->cfg_reg); in clk_pll_set_rate()
162 if (pll->vco->lock) in clk_pll_set_rate()
163 spin_unlock_irqrestore(pll->vco->lock, flags); in clk_pll_set_rate()
177 struct clk_vco *vco = to_clk_vco(hw); in vco_calc_rate() local
179 return pll_calc_rate(vco->rtbl, prate, index, NULL); in vco_calc_rate()
185 struct clk_vco *vco = to_clk_vco(hw); in clk_vco_round_rate() local
189 vco->rtbl_cnt, &unused); in clk_vco_round_rate()
195 struct clk_vco *vco = to_clk_vco(hw); in clk_vco_recalc_rate() local
199 if (vco->lock) in clk_vco_recalc_rate()
200 spin_lock_irqsave(vco->lock, flags); in clk_vco_recalc_rate()
202 mode = (readl_relaxed(vco->mode_reg) >> PLL_MODE_SHIFT) & PLL_MODE_MASK; in clk_vco_recalc_rate()
204 val = readl_relaxed(vco->cfg_reg); in clk_vco_recalc_rate()
206 if (vco->lock) in clk_vco_recalc_rate()
207 spin_unlock_irqrestore(vco->lock, flags); in clk_vco_recalc_rate()
229 /* Configures new clock rate of vco */
233 struct clk_vco *vco = to_clk_vco(hw); in clk_vco_set_rate() local
234 struct pll_rate_tbl *rtbl = vco->rtbl; in clk_vco_set_rate()
238 clk_round_rate_index(hw, drate, prate, vco_calc_rate, vco->rtbl_cnt, in clk_vco_set_rate()
241 if (vco->lock) in clk_vco_set_rate()
242 spin_lock_irqsave(vco->lock, flags); in clk_vco_set_rate()
244 val = readl_relaxed(vco->mode_reg); in clk_vco_set_rate()
247 writel_relaxed(val, vco->mode_reg); in clk_vco_set_rate()
249 val = readl_relaxed(vco->cfg_reg); in clk_vco_set_rate()
261 writel_relaxed(val, vco->cfg_reg); in clk_vco_set_rate()
263 if (vco->lock) in clk_vco_set_rate()
264 spin_unlock_irqrestore(vco->lock, flags); in clk_vco_set_rate()
282 struct clk_vco *vco; in clk_register_vco_pll() local
294 vco = kzalloc(sizeof(*vco), GFP_KERNEL); in clk_register_vco_pll()
295 if (!vco) in clk_register_vco_pll()
303 vco->mode_reg = mode_reg; in clk_register_vco_pll()
304 vco->cfg_reg = cfg_reg; in clk_register_vco_pll()
305 vco->rtbl = rtbl; in clk_register_vco_pll()
306 vco->rtbl_cnt = rtbl_cnt; in clk_register_vco_pll()
307 vco->lock = lock; in clk_register_vco_pll()
308 vco->hw.init = &vco_init; in clk_register_vco_pll()
310 pll->vco = vco; in clk_register_vco_pll()
338 vco_clk = clk_register(NULL, &vco->hw); in clk_register_vco_pll()
354 kfree(vco); in clk_register_vco_pll()
356 pr_err("Failed to register vco pll clock\n"); in clk_register_vco_pll()