341 static inline void clkc_writel(u32 val, unsigned reg)  in clkc_writel()  function
504 	clkc_writel(val, reg);  in dto_clk_enable()
516 	clkc_writel(val, reg);  in dto_clk_disable()
556 	clkc_writel(0, clk->src_offset + SIRFSOC_CLKC_AUDIO_DTO_DROFF - SIRFSOC_CLKC_AUDIO_DTO_SRC);  in dto_clk_set_rate()
557 	clkc_writel(dividend, clk->inc_offset);  in dto_clk_set_rate()
576 	clkc_writel(index, clk->src_offset);  in dto_clk_set_parent()
1222 	clkc_writel(BIT(clk->bit), reg);  in unit_clk_enable()
1224 		clkc_writel(BIT(clk->idle_bit), SIRFSOC_NOC_CLK_IDLEREQ_CLR);  in unit_clk_enable()
1226 		clkc_writel(BIT(clk->idle_bit), SIRFSOC_NOC_CLK_SLVRDY_SET);  in unit_clk_enable()
1242 		clkc_writel(BIT(clk->idle_bit), SIRFSOC_NOC_CLK_IDLEREQ_SET);  in unit_clk_disable()
1252 			clkc_writel(BIT(clk->idle_bit), SIRFSOC_NOC_CLK_IDLEREQ_CLR);  in unit_clk_disable()
1257 		clkc_writel(BIT(clk->idle_bit), SIRFSOC_NOC_CLK_SLVRDY_CLR);  in unit_clk_disable()
1259 	clkc_writel(BIT(clk->bit), reg);  in unit_clk_disable()
1407 		clkc_writel(1 << reset->rst_bit, reset->rst_ofs + 4);  in atlas7_reset_module()
1409 		clkc_writel(1 << reset->clk_bit, reset->clk_ofs + 4);  in atlas7_reset_module()
1410 		clkc_writel(1 << reset->rst_bit, reset->rst_ofs);  in atlas7_reset_module()
1412 		clkc_writel(1 << reset->clk_bit, reset->clk_ofs);  in atlas7_reset_module()
1414 		clkc_writel(1 << reset->rst_bit, reset->rst_ofs + 4);  in atlas7_reset_module()
1415 		clkc_writel(1 << reset->clk_bit, reset->clk_ofs);  in atlas7_reset_module()
1417 		clkc_writel(1 << reset->clk_bit, reset->clk_ofs + 4);  in atlas7_reset_module()
1418 		clkc_writel(1 << reset->rst_bit, reset->rst_ofs);  in atlas7_reset_module()