286 	u32 mdiv, pdiv, sdiv, pll_con0, pll_con1;  in samsung_pll36xx_recalc_rate()  local
290 	pll_con0 = readl_relaxed(pll->con_reg);  in samsung_pll36xx_recalc_rate()
292 	mdiv = (pll_con0 >> PLL36XX_MDIV_SHIFT) & PLL36XX_MDIV_MASK;  in samsung_pll36xx_recalc_rate()
293 	pdiv = (pll_con0 >> PLL36XX_PDIV_SHIFT) & PLL36XX_PDIV_MASK;  in samsung_pll36xx_recalc_rate()
294 	sdiv = (pll_con0 >> PLL36XX_SDIV_SHIFT) & PLL36XX_SDIV_MASK;  in samsung_pll36xx_recalc_rate()
305 	const struct samsung_pll_rate_table *rate, u32 pll_con0, u32 pll_con1)  in samsung_pll36xx_mpk_change()  argument
309 	old_mdiv = (pll_con0 >> PLL36XX_MDIV_SHIFT) & PLL36XX_MDIV_MASK;  in samsung_pll36xx_mpk_change()
310 	old_pdiv = (pll_con0 >> PLL36XX_PDIV_SHIFT) & PLL36XX_PDIV_MASK;  in samsung_pll36xx_mpk_change()
321 	u32 tmp, pll_con0, pll_con1;  in samsung_pll36xx_set_rate()  local
331 	pll_con0 = readl_relaxed(pll->con_reg);  in samsung_pll36xx_set_rate()
334 	if (!(samsung_pll36xx_mpk_change(rate, pll_con0, pll_con1))) {  in samsung_pll36xx_set_rate()
336 		pll_con0 &= ~(PLL36XX_SDIV_MASK << PLL36XX_SDIV_SHIFT);  in samsung_pll36xx_set_rate()
337 		pll_con0 |= (rate->sdiv << PLL36XX_SDIV_SHIFT);  in samsung_pll36xx_set_rate()
338 		writel_relaxed(pll_con0, pll->con_reg);  in samsung_pll36xx_set_rate()
347 	pll_con0 &= ~((PLL36XX_MDIV_MASK << PLL36XX_MDIV_SHIFT) |  in samsung_pll36xx_set_rate()
350 	pll_con0 |= (rate->mdiv << PLL36XX_MDIV_SHIFT) |  in samsung_pll36xx_set_rate()
353 	writel_relaxed(pll_con0, pll->con_reg);  in samsung_pll36xx_set_rate()
360 	if (pll_con0 & BIT(pll->enable_offs)) {  in samsung_pll36xx_set_rate()
421 static bool samsung_pll45xx_mp_change(u32 pll_con0, u32 pll_con1,  in samsung_pll45xx_mp_change()  argument
426 	old_mdiv = (pll_con0 >> PLL45XX_MDIV_SHIFT) & PLL45XX_MDIV_MASK;  in samsung_pll45xx_mp_change()
427 	old_pdiv = (pll_con0 >> PLL45XX_PDIV_SHIFT) & PLL45XX_PDIV_MASK;  in samsung_pll45xx_mp_change()
551 	u32 mdiv, pdiv, sdiv, kdiv, pll_con0, pll_con1, shift;  in samsung_pll46xx_recalc_rate()  local
554 	pll_con0 = readl_relaxed(pll->con_reg);  in samsung_pll46xx_recalc_rate()
556 	mdiv = (pll_con0 >> PLL46XX_MDIV_SHIFT) & ((pll->type == pll_1460x) ?  in samsung_pll46xx_recalc_rate()
558 	pdiv = (pll_con0 >> PLL46XX_PDIV_SHIFT) & PLL46XX_PDIV_MASK;  in samsung_pll46xx_recalc_rate()
559 	sdiv = (pll_con0 >> PLL46XX_SDIV_SHIFT) & PLL46XX_SDIV_MASK;  in samsung_pll46xx_recalc_rate()
572 static bool samsung_pll46xx_mpk_change(u32 pll_con0, u32 pll_con1,  in samsung_pll46xx_mpk_change()  argument
577 	old_mdiv = (pll_con0 >> PLL46XX_MDIV_SHIFT) & PLL46XX_MDIV_MASK;  in samsung_pll46xx_mpk_change()
578 	old_pdiv = (pll_con0 >> PLL46XX_PDIV_SHIFT) & PLL46XX_PDIV_MASK;  in samsung_pll46xx_mpk_change()
734 	u32 mdiv, pdiv, sdiv, kdiv, pll_con0, pll_con1;  in samsung_pll6553_recalc_rate()  local
737 	pll_con0 = readl_relaxed(pll->con_reg);  in samsung_pll6553_recalc_rate()
739 	mdiv = (pll_con0 >> PLL6553_MDIV_SHIFT) & PLL6553_MDIV_MASK;  in samsung_pll6553_recalc_rate()
740 	pdiv = (pll_con0 >> PLL6553_PDIV_SHIFT) & PLL6553_PDIV_MASK;  in samsung_pll6553_recalc_rate()
741 	sdiv = (pll_con0 >> PLL6553_SDIV_SHIFT) & PLL6553_SDIV_MASK;  in samsung_pll6553_recalc_rate()
1082 	u32 mdiv, pdiv, sdiv, pll_con0, pll_con1;  in samsung_pll2650x_recalc_rate()  local
1085 	pll_con0 = readl_relaxed(pll->con_reg);  in samsung_pll2650x_recalc_rate()
1086 	mdiv = (pll_con0 >> PLL2650X_M_SHIFT) & PLL2650X_M_MASK;  in samsung_pll2650x_recalc_rate()
1087 	pdiv = (pll_con0 >> PLL2650X_P_SHIFT) & PLL2650X_P_MASK;  in samsung_pll2650x_recalc_rate()
1088 	sdiv = (pll_con0 >> PLL2650X_S_SHIFT) & PLL2650X_S_MASK;  in samsung_pll2650x_recalc_rate()
1177 	u32 mdiv, pdiv, sdiv, pll_con0, pll_con2;  in samsung_pll2650xx_recalc_rate()  local
1181 	pll_con0 = readl_relaxed(pll->con_reg);  in samsung_pll2650xx_recalc_rate()
1183 	mdiv = (pll_con0 >> PLL2650XX_MDIV_SHIFT) & PLL2650XX_MDIV_MASK;  in samsung_pll2650xx_recalc_rate()
1184 	pdiv = (pll_con0 >> PLL2650XX_PDIV_SHIFT) & PLL2650XX_PDIV_MASK;  in samsung_pll2650xx_recalc_rate()
1185 	sdiv = (pll_con0 >> PLL2650XX_SDIV_SHIFT) & PLL2650XX_SDIV_MASK;  in samsung_pll2650xx_recalc_rate()
1199 	u32 tmp, pll_con0, pll_con2;  in samsung_pll2650xx_set_rate()  local
1209 	pll_con0 = readl_relaxed(pll->con_reg);  in samsung_pll2650xx_set_rate()
1213 	pll_con0 &= ~(PLL2650XX_MDIV_MASK << PLL2650XX_MDIV_SHIFT |  in samsung_pll2650xx_set_rate()
1216 	pll_con0 |= rate->mdiv << PLL2650XX_MDIV_SHIFT;  in samsung_pll2650xx_set_rate()
1217 	pll_con0 |= rate->pdiv << PLL2650XX_PDIV_SHIFT;  in samsung_pll2650xx_set_rate()
1218 	pll_con0 |= rate->sdiv << PLL2650XX_SDIV_SHIFT;  in samsung_pll2650xx_set_rate()
1219 	pll_con0 |= 1 << PLL2650XX_PLL_ENABLE_SHIFT;  in samsung_pll2650xx_set_rate()
1220 	pll_con0 |= 1 << PLL2650XX_PLL_FOUTMASK_SHIFT;  in samsung_pll2650xx_set_rate()
1229 	writel_relaxed(pll_con0, pll->con_reg);  in samsung_pll2650xx_set_rate()