439 	u32 con0, con1;  in samsung_pll45xx_set_rate()  local
451 	con1 = readl_relaxed(pll->con_reg + 0x4);  in samsung_pll45xx_set_rate()
453 	if (!(samsung_pll45xx_mp_change(con0, con1, rate))) {  in samsung_pll45xx_set_rate()
471 	con1 = readl_relaxed(pll->con_reg + 0x4);  in samsung_pll45xx_set_rate()
472 	con1 &= ~(PLL45XX_AFC_MASK << PLL45XX_AFC_SHIFT);  in samsung_pll45xx_set_rate()
473 	con1 |= (rate->afc << PLL45XX_AFC_SHIFT);  in samsung_pll45xx_set_rate()
488 	writel_relaxed(con1, pll->con_reg + 0x4);  in samsung_pll45xx_set_rate()
590 	u32 con0, con1, lock;  in samsung_pll46xx_set_rate()  local
602 	con1 = readl_relaxed(pll->con_reg + 0x4);  in samsung_pll46xx_set_rate()
604 	if (!(samsung_pll46xx_mpk_change(con0, con1, rate))) {  in samsung_pll46xx_set_rate()
637 	con1 = readl_relaxed(pll->con_reg + 0x4);  in samsung_pll46xx_set_rate()
638 	con1 &= ~((PLL46XX_KDIV_MASK << PLL46XX_KDIV_SHIFT) |  in samsung_pll46xx_set_rate()
641 	con1 |= (rate->kdiv << PLL46XX_KDIV_SHIFT) |  in samsung_pll46xx_set_rate()
648 	writel_relaxed(con1, pll->con_reg + 0x4);  in samsung_pll46xx_set_rate()
1105 	u32 con0, con1;  in samsung_pll2650x_set_rate()  local
1116 	con1 = readl_relaxed(pll->con_reg + 4);  in samsung_pll2650x_set_rate()
1131 	con1 &= ~(PLL2650X_K_MASK << PLL2650X_K_SHIFT);  in samsung_pll2650x_set_rate()
1132 	con1 |= ((rate->kdiv & PLL2650X_K_MASK) << PLL2650X_K_SHIFT);  in samsung_pll2650x_set_rate()
1133 	writel_relaxed(con1, pll->con_reg + 4);  in samsung_pll2650x_set_rate()