Lines Matching refs:mux_hw

25 	struct clk_hw *mux_hw;  member
41 struct clk_hw *mux_hw = composite->mux_hw; in clk_regmap_composite_get_parent() local
43 __clk_hw_set_clk(mux_hw, hw); in clk_regmap_composite_get_parent()
45 return mux_ops->get_parent(mux_hw); in clk_regmap_composite_get_parent()
52 struct clk_hw *mux_hw = composite->mux_hw; in clk_regmap_composite_set_parent() local
54 __clk_hw_set_clk(mux_hw, hw); in clk_regmap_composite_set_parent()
56 return mux_ops->set_parent(mux_hw, index); in clk_regmap_composite_set_parent()
78 struct clk_hw *mux_hw = composite->mux_hw; in clk_regmap_composite_determine_rate() local
91 mux_hw && mux_ops && mux_ops->set_parent) { in clk_regmap_composite_determine_rate()
95 parent = clk_hw_get_parent(mux_hw); in clk_regmap_composite_determine_rate()
108 for (i = 0; i < clk_hw_get_num_parents(mux_hw); i++) { in clk_regmap_composite_determine_rate()
109 parent = clk_hw_get_parent_by_index(mux_hw, i); in clk_regmap_composite_determine_rate()
136 } else if (mux_hw && mux_ops && mux_ops->determine_rate) { in clk_regmap_composite_determine_rate()
137 __clk_hw_set_clk(mux_hw, hw); in clk_regmap_composite_determine_rate()
138 return mux_ops->determine_rate(mux_hw, req); in clk_regmap_composite_determine_rate()
221 struct clk_hw *mux_hw = NULL, *div_hw = NULL, *gate_hw = NULL; in devm_clk_regmap_register_composite() local
239 mux_hw = &mux->hw; in devm_clk_regmap_register_composite()
298 if (mux_hw && mux_ops) { in devm_clk_regmap_register_composite()
302 composite->mux_hw = mux_hw; in devm_clk_regmap_register_composite()
389 if (composite->mux_hw) in devm_clk_regmap_register_composite()
390 composite->mux_hw->clk = clk; in devm_clk_regmap_register_composite()