469 	u32 pllcon;  in rockchip_rk3036_pll_wait_lock()  local
477 					 pllcon,  in rockchip_rk3036_pll_wait_lock()
478 					 pllcon & RK3036_PLLCON1_LOCK_STATUS,  in rockchip_rk3036_pll_wait_lock()
513 	u32 pllcon;  in rockchip_rk3036_pll_get_params()  local
515 	pllcon = readl_relaxed(pll->reg_base + RK3036_PLLCON(0));  in rockchip_rk3036_pll_get_params()
516 	rate->fbdiv = ((pllcon >> RK3036_PLLCON0_FBDIV_SHIFT)  in rockchip_rk3036_pll_get_params()
518 	rate->postdiv1 = ((pllcon >> RK3036_PLLCON0_POSTDIV1_SHIFT)  in rockchip_rk3036_pll_get_params()
521 	pllcon = readl_relaxed(pll->reg_base + RK3036_PLLCON(1));  in rockchip_rk3036_pll_get_params()
522 	rate->refdiv = ((pllcon >> RK3036_PLLCON1_REFDIV_SHIFT)  in rockchip_rk3036_pll_get_params()
524 	rate->postdiv2 = ((pllcon >> RK3036_PLLCON1_POSTDIV2_SHIFT)  in rockchip_rk3036_pll_get_params()
526 	rate->dsmpd = ((pllcon >> RK3036_PLLCON1_DSMPD_SHIFT)  in rockchip_rk3036_pll_get_params()
529 	pllcon = readl_relaxed(pll->reg_base + RK3036_PLLCON(2));  in rockchip_rk3036_pll_get_params()
530 	rate->frac = ((pllcon >> RK3036_PLLCON2_FRAC_SHIFT)  in rockchip_rk3036_pll_get_params()
569 	u32 pllcon;  in rockchip_rk3036_pll_set_params()  local
605 	pllcon = readl_relaxed(pll->reg_base + RK3036_PLLCON(2));  in rockchip_rk3036_pll_set_params()
606 	pllcon &= ~(RK3036_PLLCON2_FRAC_MASK << RK3036_PLLCON2_FRAC_SHIFT);  in rockchip_rk3036_pll_set_params()
607 	pllcon |= rate->frac << RK3036_PLLCON2_FRAC_SHIFT;  in rockchip_rk3036_pll_set_params()
608 	writel_relaxed(pllcon, pll->reg_base + RK3036_PLLCON(2));  in rockchip_rk3036_pll_set_params()
678 	u32 pllcon = readl(pll->reg_base + RK3036_PLLCON(1));  in rockchip_rk3036_pll_is_enabled()  local
680 	return !(pllcon & RK3036_PLLCON1_PWRDOWN);  in rockchip_rk3036_pll_is_enabled()
770 	u32 pllcon;  in rockchip_rk3066_pll_get_params()  local
772 	pllcon = readl_relaxed(pll->reg_base + RK3066_PLLCON(0));  in rockchip_rk3066_pll_get_params()
773 	rate->nr = ((pllcon >> RK3066_PLLCON0_NR_SHIFT)  in rockchip_rk3066_pll_get_params()
775 	rate->no = ((pllcon >> RK3066_PLLCON0_OD_SHIFT)  in rockchip_rk3066_pll_get_params()
778 	pllcon = readl_relaxed(pll->reg_base + RK3066_PLLCON(1));  in rockchip_rk3066_pll_get_params()
779 	rate->nf = ((pllcon >> RK3066_PLLCON1_NF_SHIFT)  in rockchip_rk3066_pll_get_params()
782 	pllcon = readl_relaxed(pll->reg_base + RK3066_PLLCON(2));  in rockchip_rk3066_pll_get_params()
783 	rate->nb = ((pllcon >> RK3066_PLLCON2_NB_SHIFT)  in rockchip_rk3066_pll_get_params()
793 	u32 pllcon;  in rockchip_rk3066_pll_recalc_rate()  local
795 	pllcon = readl_relaxed(pll->reg_base + RK3066_PLLCON(3));  in rockchip_rk3066_pll_recalc_rate()
796 	if (pllcon & RK3066_PLLCON3_BYPASS) {  in rockchip_rk3066_pll_recalc_rate()
929 	u32 pllcon = readl(pll->reg_base + RK3066_PLLCON(3));  in rockchip_rk3066_pll_is_enabled()  local
931 	return !(pllcon & RK3066_PLLCON3_PWRDOWN);  in rockchip_rk3066_pll_is_enabled()
1005 	u32 pllcon;  in rockchip_rk3399_pll_wait_lock()  local
1013 					 pllcon,  in rockchip_rk3399_pll_wait_lock()
1014 					 pllcon & RK3399_PLLCON2_LOCK_STATUS,  in rockchip_rk3399_pll_wait_lock()
1025 	u32 pllcon;  in rockchip_rk3399_pll_get_params()  local
1027 	pllcon = readl_relaxed(pll->reg_base + RK3399_PLLCON(0));  in rockchip_rk3399_pll_get_params()
1028 	rate->fbdiv = ((pllcon >> RK3399_PLLCON0_FBDIV_SHIFT)  in rockchip_rk3399_pll_get_params()
1031 	pllcon = readl_relaxed(pll->reg_base + RK3399_PLLCON(1));  in rockchip_rk3399_pll_get_params()
1032 	rate->refdiv = ((pllcon >> RK3399_PLLCON1_REFDIV_SHIFT)  in rockchip_rk3399_pll_get_params()
1034 	rate->postdiv1 = ((pllcon >> RK3399_PLLCON1_POSTDIV1_SHIFT)  in rockchip_rk3399_pll_get_params()
1036 	rate->postdiv2 = ((pllcon >> RK3399_PLLCON1_POSTDIV2_SHIFT)  in rockchip_rk3399_pll_get_params()
1039 	pllcon = readl_relaxed(pll->reg_base + RK3399_PLLCON(2));  in rockchip_rk3399_pll_get_params()
1040 	rate->frac = ((pllcon >> RK3399_PLLCON2_FRAC_SHIFT)  in rockchip_rk3399_pll_get_params()
1043 	pllcon = readl_relaxed(pll->reg_base + RK3399_PLLCON(3));  in rockchip_rk3399_pll_get_params()
1044 	rate->dsmpd = ((pllcon >> RK3399_PLLCON3_DSMPD_SHIFT)  in rockchip_rk3399_pll_get_params()
1083 	u32 pllcon;  in rockchip_rk3399_pll_set_params()  local
1120 	pllcon = readl_relaxed(pll->reg_base + RK3399_PLLCON(2));  in rockchip_rk3399_pll_set_params()
1121 	pllcon &= ~(RK3399_PLLCON2_FRAC_MASK << RK3399_PLLCON2_FRAC_SHIFT);  in rockchip_rk3399_pll_set_params()
1122 	pllcon |= rate->frac << RK3399_PLLCON2_FRAC_SHIFT;  in rockchip_rk3399_pll_set_params()
1123 	writel_relaxed(pllcon, pll->reg_base + RK3399_PLLCON(2));  in rockchip_rk3399_pll_set_params()
1197 	u32 pllcon = readl(pll->reg_base + RK3399_PLLCON(3));  in rockchip_rk3399_pll_is_enabled()  local
1199 	return !(pllcon & RK3399_PLLCON3_PWRDOWN);  in rockchip_rk3399_pll_is_enabled()
1285 	u32 pllcon;  in rockchip_rk3588_pll_wait_lock()  local
1293 					 pllcon,  in rockchip_rk3588_pll_wait_lock()
1294 					 pllcon & RK3588_PLLCON6_LOCK_STATUS,  in rockchip_rk3588_pll_wait_lock()
1314 	u32 pllcon;  in rockchip_rk3588_pll_get_params()  local
1316 	pllcon = readl_relaxed(pll->reg_base + RK3588_PLLCON(0));  in rockchip_rk3588_pll_get_params()
1317 	rate->m = ((pllcon >> RK3588_PLLCON0_M_SHIFT)  in rockchip_rk3588_pll_get_params()
1320 	pllcon = readl_relaxed(pll->reg_base + RK3588_PLLCON(1));  in rockchip_rk3588_pll_get_params()
1321 	rate->p = ((pllcon >> RK3588_PLLCON1_P_SHIFT)  in rockchip_rk3588_pll_get_params()
1323 	rate->s = ((pllcon >> RK3588_PLLCON1_S_SHIFT)  in rockchip_rk3588_pll_get_params()
1326 	pllcon = readl_relaxed(pll->reg_base + RK3588_PLLCON(2));  in rockchip_rk3588_pll_get_params()
1327 	rate->k = ((pllcon >> RK3588_PLLCON2_K_SHIFT)  in rockchip_rk3588_pll_get_params()
1482 	u32 pllcon = readl(pll->reg_base + RK3588_PLLCON(1));  in rockchip_rk3588_pll_is_enabled()  local
1484 	return !(pllcon & RK3588_PLLCON1_PWRDOWN);  in rockchip_rk3588_pll_is_enabled()
1521 	u32 pllcon, pllcon0, pllcon2, fbdiv_mask, frac_mask, frac_shift;  in rockchip_pll_clk_compensation()  local
1594 		pllcon = readl_relaxed(pll->reg_base + pllcon2);  in rockchip_pll_clk_compensation()
1595 		pllcon &= ~(frac_mask << frac_shift);  in rockchip_pll_clk_compensation()
1596 		pllcon |= fracdiv << frac_shift;  in rockchip_pll_clk_compensation()
1597 		writel_relaxed(pllcon, pll->reg_base + pllcon2);  in rockchip_pll_clk_compensation()