33 	const struct clk_ops	*pll_mux_ops;  member
566 	const struct clk_ops *pll_mux_ops = pll->pll_mux_ops;  in rockchip_rk3036_pll_set_params()  local
582 		cur_parent = pll_mux_ops->get_parent(&pll_mux->hw);  in rockchip_rk3036_pll_set_params()
584 			pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW);  in rockchip_rk3036_pll_set_params()
622 		pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM);  in rockchip_rk3036_pll_set_params()
650 	const struct clk_ops *pll_mux_ops = pll->pll_mux_ops;  in rockchip_rk3036_pll_enable()  local
657 	pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM);  in rockchip_rk3036_pll_enable()
665 	const struct clk_ops *pll_mux_ops = pll->pll_mux_ops;  in rockchip_rk3036_pll_disable()  local
668 	pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW);  in rockchip_rk3036_pll_disable()
817 	const struct clk_ops *pll_mux_ops = pll->pll_mux_ops;  in rockchip_rk3066_pll_set_params()  local
830 	cur_parent = pll_mux_ops->get_parent(&pll_mux->hw);  in rockchip_rk3066_pll_set_params()
832 		pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW);  in rockchip_rk3066_pll_set_params()
868 		pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM);  in rockchip_rk3066_pll_set_params()
1080 	const struct clk_ops *pll_mux_ops = pll->pll_mux_ops;  in rockchip_rk3399_pll_set_params()  local
1095 	cur_parent = pll_mux_ops->get_parent(&pll_mux->hw);  in rockchip_rk3399_pll_set_params()
1097 		pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW);  in rockchip_rk3399_pll_set_params()
1143 		pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM);  in rockchip_rk3399_pll_set_params()
1365 	const struct clk_ops *pll_mux_ops = pll->pll_mux_ops;  in rockchip_rk3588_pll_set_params()  local
1379 		cur_parent = pll_mux_ops->get_parent(&pll_mux->hw);  in rockchip_rk3588_pll_set_params()
1381 			pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW);  in rockchip_rk3588_pll_set_params()
1420 		pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM);  in rockchip_rk3588_pll_set_params()
1454 	const struct clk_ops *pll_mux_ops = pll->pll_mux_ops;  in rockchip_rk3588_pll_enable()  local
1461 	pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM);  in rockchip_rk3588_pll_enable()
1469 	const struct clk_ops *pll_mux_ops = pll->pll_mux_ops;  in rockchip_rk3588_pll_disable()  local
1472 	pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW);  in rockchip_rk3588_pll_disable()
1653 	pll->pll_mux_ops = &clk_mux_ops;  in rockchip_clk_register_pll()
1673 	init.ops = pll->pll_mux_ops;  in rockchip_clk_register_pll()