171 static int rockchip_pll_clk_set_postdiv(unsigned long fout_hz,  in rockchip_pll_clk_set_postdiv()  argument
178 	if (fout_hz < MIN_FOUTVCO_FREQ) {  in rockchip_pll_clk_set_postdiv()
181 				freq = fout_hz * (*postdiv1) * (*postdiv2);  in rockchip_pll_clk_set_postdiv()
190 		       fout_hz);  in rockchip_pll_clk_set_postdiv()
201 			     unsigned long fout_hz)  in rockchip_pll_clk_set_by_auto()  argument
205 	u32 foutvco = fout_hz;  in rockchip_pll_clk_set_by_auto()
210 	if (fin_hz == 0 || fout_hz == 0 || fout_hz == fin_hz)  in rockchip_pll_clk_set_by_auto()
213 	rockchip_pll_clk_set_postdiv(fout_hz, &postdiv1, &postdiv2, &foutvco);  in rockchip_pll_clk_set_by_auto()
218 	if (fin_hz / MHZ * MHZ == fin_hz && fout_hz / MHZ * MHZ == fout_hz) {  in rockchip_pll_clk_set_by_auto()
228 			 fin_hz, fout_hz, clk_gcd, rate_table->refdiv,  in rockchip_pll_clk_set_by_auto()
233 			 fin_hz, fout_hz,  in rockchip_pll_clk_set_by_auto()
235 			 fout_hz / MHZ * MHZ);  in rockchip_pll_clk_set_by_auto()
262 				    unsigned long fout_hz)  in rockchip_rk3066_pll_clk_set_by_auto()  argument
276 	if (fin_hz == 0 || fout_hz == 0 || fout_hz == fin_hz)  in rockchip_rk3066_pll_clk_set_by_auto()
279 	clk_gcd = gcd(fin_hz, fout_hz);  in rockchip_rk3066_pll_clk_set_by_auto()
281 	numerator = fout_hz / clk_gcd;  in rockchip_rk3066_pll_clk_set_by_auto()
338 				    unsigned long fout_hz)  in rockchip_rk3588_pll_clk_set_by_auto()  argument
346 	if (fin_hz == 0 || fout_hz == 0 || fout_hz == fin_hz)  in rockchip_rk3588_pll_clk_set_by_auto()
349 	if (fout_hz > fout_max || fout_hz < fout_min)  in rockchip_rk3588_pll_clk_set_by_auto()
352 	if (fin_hz / MHZ * MHZ == fin_hz && fout_hz / MHZ * MHZ == fout_hz) {  in rockchip_rk3588_pll_clk_set_by_auto()
354 			fvco = (u64)fout_hz << s;  in rockchip_rk3588_pll_clk_set_by_auto()
369 		pr_err("CANNOT FIND Fout by auto,fout = %lu\n", fout_hz);  in rockchip_rk3588_pll_clk_set_by_auto()
372 			fvco = (u64)fout_hz << s;  in rockchip_rk3588_pll_clk_set_by_auto()
390 		pr_err("CANNOT FIND Fout by auto,fout = %lu\n", fout_hz);  in rockchip_rk3588_pll_clk_set_by_auto()