Lines Matching full:divider
18 struct clk_divider *divider = to_clk_divider(hw); in clk_dclk_recalc_rate() local
21 val = clk_readl(divider->reg) >> divider->shift; in clk_dclk_recalc_rate()
22 val &= div_mask(divider->width); in clk_dclk_recalc_rate()
30 struct clk_divider *divider = to_clk_divider(hw); in clk_dclk_round_rate() local
31 int div, maxdiv = div_mask(divider->width) + 1; in clk_dclk_round_rate()
33 div = DIV_ROUND_UP_ULL(divider->max_prate, rate); in clk_dclk_round_rate()
44 struct clk_divider *divider = to_clk_divider(hw); in clk_dclk_set_rate() local
49 value = divider_get_val(rate, parent_rate, divider->table, in clk_dclk_set_rate()
50 divider->width, divider->flags); in clk_dclk_set_rate()
52 if (divider->lock) in clk_dclk_set_rate()
53 spin_lock_irqsave(divider->lock, flags); in clk_dclk_set_rate()
55 __acquire(divider->lock); in clk_dclk_set_rate()
57 if (divider->flags & CLK_DIVIDER_HIWORD_MASK) { in clk_dclk_set_rate()
58 val = div_mask(divider->width) << (divider->shift + 16); in clk_dclk_set_rate()
60 val = clk_readl(divider->reg); in clk_dclk_set_rate()
61 val &= ~(div_mask(divider->width) << divider->shift); in clk_dclk_set_rate()
63 val |= value << divider->shift; in clk_dclk_set_rate()
64 clk_writel(val, divider->reg); in clk_dclk_set_rate()
66 if (divider->lock) in clk_dclk_set_rate()
67 spin_unlock_irqrestore(divider->lock, flags); in clk_dclk_set_rate()
69 __release(divider->lock); in clk_dclk_set_rate()