1 // SPDX-License-Identifier: GPL-2.0
3  * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
6 #include <linux/clk-provider.h>
13 #include <soc/qcom/cmd-db.h>
17 #include <dt-bindings/clock/qcom,rpmh.h>
23  * struct bcm_db - Auxiliary data pertaining to each Bus Clock Manager(BCM)
24  * @unit: divisor used to convert Hz value to an RPMh msg
25  * @width: multiplier used to convert Hz value to an RPMh msg
37  * struct clk_rpmh - individual rpmh clock data structure
38  * @hw:			handle between common and hardware-specific interfaces
40  * @div:		clock divider to compute the clock rate
47  * @unit:		divisor to convert rate to rpmh msg in magnitudes of Khz
142 	return (c->last_sent_aggr_state & BIT(state))  in has_state_changed()
143 		!= (c->aggr_state & BIT(state));  in has_state_changed()
150 		return rpmh_write(c->dev, state, cmd, 1);  in clk_rpmh_send()
152 	return rpmh_write_async(c->dev, state, cmd, 1);  in clk_rpmh_send()
163 	cmd.addr = c->res_addr;  in clk_rpmh_send_aggregate_command()
164 	cmd_state = c->aggr_state;  in clk_rpmh_send_aggregate_command()
165 	on_val = c->res_on_val;  in clk_rpmh_send_aggregate_command()
175 				dev_err(c->dev, "set %s state of %s failed: (%d)\n",  in clk_rpmh_send_aggregate_command()
178 					"wake" : "active", c->res_name, ret);  in clk_rpmh_send_aggregate_command()
184 	c->last_sent_aggr_state = c->aggr_state;  in clk_rpmh_send_aggregate_command()
185 	c->peer->last_sent_aggr_state =  c->last_sent_aggr_state;  in clk_rpmh_send_aggregate_command()
199 	if (enable == c->state)  in clk_rpmh_aggregate_state_send_command()
202 	c->state = enable ? c->valid_state_mask : 0;  in clk_rpmh_aggregate_state_send_command()
203 	c->aggr_state = c->state | c->peer->state;  in clk_rpmh_aggregate_state_send_command()
204 	c->peer->aggr_state = c->aggr_state;  in clk_rpmh_aggregate_state_send_command()
211 		c->state = 0;  in clk_rpmh_aggregate_state_send_command()
213 		c->state = c->valid_state_mask;  in clk_rpmh_aggregate_state_send_command()
215 	WARN(1, "clk: %s failed to %s\n", c->res_name,  in clk_rpmh_aggregate_state_send_command()
247 	 * RPMh clocks have a fixed rate. Return static rate.  in clk_rpmh_recalc_rate()
249 	return prate / r->div;  in clk_rpmh_recalc_rate()
267 		if (c->aggr_state)  in clk_rpmh_bcm_send_cmd()
268 			cmd_state = c->aggr_state;  in clk_rpmh_bcm_send_cmd()
273 	if (c->last_sent_aggr_state != cmd_state) {  in clk_rpmh_bcm_send_cmd()
274 		cmd.addr = c->res_addr;  in clk_rpmh_bcm_send_cmd()
279 			dev_err(c->dev, "set active state of %s failed: (%d)\n",  in clk_rpmh_bcm_send_cmd()
280 				c->res_name, ret);  in clk_rpmh_bcm_send_cmd()
282 			c->last_sent_aggr_state = cmd_state;  in clk_rpmh_bcm_send_cmd()
305 static int clk_rpmh_bcm_set_rate(struct clk_hw *hw, unsigned long rate,  in clk_rpmh_bcm_set_rate()  argument
310 	c->aggr_state = rate / c->unit;  in clk_rpmh_bcm_set_rate()
312 	 * Since any non-zero value sent to hw would result in enabling the  in clk_rpmh_bcm_set_rate()
321 static long clk_rpmh_round_rate(struct clk_hw *hw, unsigned long rate,  in clk_rpmh_round_rate()  argument
324 	return rate;  in clk_rpmh_round_rate()
332 	return c->aggr_state * c->unit;  in clk_rpmh_bcm_recalc_rate()
343 /* Resource name must match resource id present in cmd-db */
439 	unsigned int idx = clkspec->args[0];  in of_clk_rpmh_hw_get()
441 	if (idx >= rpmh->num_clks) {  in of_clk_rpmh_hw_get()
443 		return ERR_PTR(-EINVAL);  in of_clk_rpmh_hw_get()
446 	return rpmh->clks[idx];  in of_clk_rpmh_hw_get()
456 	desc = of_device_get_match_data(&pdev->dev);  in clk_rpmh_probe()
458 		return -ENODEV;  in clk_rpmh_probe()
460 	hw_clks = desc->clks;  in clk_rpmh_probe()
462 	for (i = 0; i < desc->num_clks; i++) {  in clk_rpmh_probe()
471 		name = hw_clks[i]->init->name;  in clk_rpmh_probe()
474 		res_addr = cmd_db_read_addr(rpmh_clk->res_name);  in clk_rpmh_probe()
476 			dev_err(&pdev->dev, "missing RPMh resource address for %s\n",  in clk_rpmh_probe()
477 				rpmh_clk->res_name);  in clk_rpmh_probe()
478 			return -ENODEV;  in clk_rpmh_probe()
481 		data = cmd_db_read_aux_data(rpmh_clk->res_name, &aux_data_len);  in clk_rpmh_probe()
484 			dev_err(&pdev->dev,  in clk_rpmh_probe()
486 				rpmh_clk->res_name, ret);  in clk_rpmh_probe()
490 		/* Convert unit from Khz to Hz */  in clk_rpmh_probe()
492 			rpmh_clk->unit = le32_to_cpu(data->unit) * 1000ULL;  in clk_rpmh_probe()
494 		rpmh_clk->res_addr += res_addr;  in clk_rpmh_probe()
495 		rpmh_clk->dev = &pdev->dev;  in clk_rpmh_probe()
497 		ret = devm_clk_hw_register(&pdev->dev, hw_clks[i]);  in clk_rpmh_probe()
499 			dev_err(&pdev->dev, "failed to register %s\n", name);  in clk_rpmh_probe()
505 	ret = devm_of_clk_add_hw_provider(&pdev->dev, of_clk_rpmh_hw_get,  in clk_rpmh_probe()
508 		dev_err(&pdev->dev, "Failed to add clock provider\n");  in clk_rpmh_probe()
512 	dev_dbg(&pdev->dev, "Registered RPMh clocks\n");  in clk_rpmh_probe()
518 	{ .compatible = "qcom,sc7180-rpmh-clk", .data = &clk_rpmh_sc7180},
519 	{ .compatible = "qcom,sdm845-rpmh-clk", .data = &clk_rpmh_sdm845},
520 	{ .compatible = "qcom,sm8150-rpmh-clk", .data = &clk_rpmh_sm8150},
521 	{ .compatible = "qcom,sm8250-rpmh-clk", .data = &clk_rpmh_sm8250},
529 		.name	= "clk-rpmh",