Lines Matching refs:PLL_MODE
15 #define PLL_MODE(p) ((p)->offset + 0x0) macro
169 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in wait_for_pll()
174 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in wait_for_pll()
247 qcom_pll_set_fsm_mode(regmap, PLL_MODE(pll), 6, 0); in clk_alpha_pll_configure()
257 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in clk_alpha_pll_hwfsm_enable()
266 ret = regmap_write(pll->clkr.regmap, PLL_MODE(pll), val); in clk_alpha_pll_hwfsm_enable()
282 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in clk_alpha_pll_hwfsm_disable()
287 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), in clk_alpha_pll_hwfsm_disable()
298 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), in clk_alpha_pll_hwfsm_disable()
312 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in pll_is_enabled()
336 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in clk_alpha_pll_enable()
352 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), in clk_alpha_pll_enable()
364 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), in clk_alpha_pll_enable()
373 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), in clk_alpha_pll_enable()
387 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in clk_alpha_pll_disable()
398 regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), mask, 0); in clk_alpha_pll_disable()
405 regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), mask, 0); in clk_alpha_pll_disable()
489 regmap_read(pll->clkr.regmap, PLL_MODE(pll), &mode); in __clk_alpha_pll_update_latch()
492 regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_UPDATE, in __clk_alpha_pll_update_latch()
510 regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_UPDATE, 0); in __clk_alpha_pll_update_latch()
766 ret = regmap_read(regmap, PLL_MODE(pll), &mode_regval); in trion_pll_is_enabled()
788 ret = regmap_read(regmap, PLL_MODE(pll), &val); in clk_trion_pll_enable()
814 return regmap_update_bits(regmap, PLL_MODE(pll), in clk_trion_pll_enable()
825 ret = regmap_read(regmap, PLL_MODE(pll), &val); in clk_trion_pll_disable()
836 ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0); in clk_trion_pll_disable()
848 regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N); in clk_trion_pll_disable()
1042 regmap_update_bits(regmap, PLL_MODE(pll), PLL_UPDATE_BYPASS, in clk_fabia_pll_configure()
1045 regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N); in clk_fabia_pll_configure()
1056 ret = regmap_read(regmap, PLL_MODE(pll), &val); in alpha_pll_fabia_enable()
1076 ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0); in alpha_pll_fabia_enable()
1084 ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, in alpha_pll_fabia_enable()
1102 return regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, in alpha_pll_fabia_enable()
1113 ret = regmap_read(regmap, PLL_MODE(pll), &val); in alpha_pll_fabia_disable()
1123 ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0); in alpha_pll_fabia_disable()
1186 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in alpha_pll_fabia_prepare()
1354 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in clk_alpha_pll_postdiv_fabia_set_rate()
1435 regmap_update_bits(regmap, PLL_MODE(pll), PLL_UPDATE_BYPASS, in clk_trion_pll_configure()
1439 regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0); in clk_trion_pll_configure()
1445 regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N); in clk_trion_pll_configure()
1506 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), in alpha_pll_trion_set_rate()
1513 regmap_read(pll->clkr.regmap, PLL_MODE(pll), ®val); in alpha_pll_trion_set_rate()
1520 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), in alpha_pll_trion_set_rate()