clk/meson/axg-aoclk.c

1 // SPDX-License-Identifier: GPL-2.0+
3  * Amlogic Meson-AXG Clock Controller Driver
11 #include <linux/clk-provider.h>
13 #include <linux/reset-controller.h>
16 #include "meson-aoclk.h"
17 #include "axg-aoclk.h"
19 #include "clk-regmap.h"
20 #include "clk-dualdiv.h"
24  * Register offsets from the data sheet must be multiplied by 4.
37 	.data = &(struct clk_regmap_gate_data) {			\
45 			.fw_name = "mpeg-clk",				\
61 	.data = &(struct clk_regmap_gate_data){
76 	.data = &(struct clk_regmap_gate_data){
101 	.data = &(struct meson_clk_dualdiv_data){
104 			.shift   = 0,
109 			.shift   = 12,
114 			.shift   = 0,
119 			.shift   = 12,
124 			.shift   = 28,
140 	.data = &(struct clk_regmap_mux_data) {
143 		.shift = 24,
159 	.data = &(struct clk_regmap_gate_data){
175 	.data = &(struct clk_regmap_mux_data) {
178 		.shift = 10,
186 			{ .fw_name = "ext_32k-0", },
194 	.data = &(struct clk_regmap_mux_data) {
197 		.shift = 8,
204 			{ .fw_name = "mpeg-clk", },
213 	.data = &(struct clk_regmap_mux_data) {
216 		.shift = 9,
230 	.data = &(struct clk_regmap_div_data) {
232 		.shift = 0,
247 	.data = &(struct clk_regmap_gate_data) {
325 		.compatible	= "amlogic,meson-axg-aoclkc",
326 		.data		= &axg_aoclkc_data,
335 		.name	= "axg-aoclkc",