clk/mediatek/clk-mt8173.c

1 // SPDX-License-Identifier: GPL-2.0-only
11 #include "clk-mtk.h"
12 #include "clk-gate.h"
13 #include "clk-cpumux.h"
15 #include <dt-bindings/clock/mt8173-clk.h>
829 	clk_prepare_enable(mt8173_pll_clk_data->clks[CLK_APMIXED_ARMCA15PLL]);  in mtk_clk_enable_critical()
830 	clk_prepare_enable(mt8173_pll_clk_data->clks[CLK_APMIXED_ARMCA7PLL]);  in mtk_clk_enable_critical()
831 	clk_prepare_enable(mt8173_top_clk_data->clks[CLK_TOP_MEM_SEL]);  in mtk_clk_enable_critical()
832 	clk_prepare_enable(mt8173_top_clk_data->clks[CLK_TOP_DDRPHYCFG_SEL]);  in mtk_clk_enable_critical()
833 	clk_prepare_enable(mt8173_top_clk_data->clks[CLK_TOP_CCI400_SEL]);  in mtk_clk_enable_critical()
834 	clk_prepare_enable(mt8173_top_clk_data->clks[CLK_TOP_RTC_SEL]);  in mtk_clk_enable_critical()
863 CLK_OF_DECLARE(mtk_topckgen, "mediatek,mt8173-topckgen", mtk_topckgen_init);
886 CLK_OF_DECLARE(mtk_infrasys, "mediatek,mt8173-infracfg", mtk_infrasys_init);
914 CLK_OF_DECLARE(mtk_pericfg, "mediatek,mt8173-pericfg", mtk_pericfg_init);
1015 		clk = mtk_clk_register_ref2usb_tx(cku->name, cku->parent,  in mtk_apmixedsys_init()
1016 					base + cku->reg_ofs);  in mtk_apmixedsys_init()
1019 			pr_err("Failed to register clk %s: %ld\n", cku->name,  in mtk_apmixedsys_init()
1024 		clk_data->clks[cku->id] = clk;  in mtk_apmixedsys_init()
1030 	clk_data->clks[CLK_APMIXED_HDMI_REF] = clk;  in mtk_apmixedsys_init()
1039 CLK_OF_DECLARE(mtk_apmixedsys, "mediatek,mt8173-apmixedsys",
1058 CLK_OF_DECLARE(mtk_imgsys, "mediatek,mt8173-imgsys", mtk_imgsys_init);
1075 CLK_OF_DECLARE(mtk_vdecsys, "mediatek,mt8173-vdecsys", mtk_vdecsys_init);
1092 CLK_OF_DECLARE(mtk_vencsys, "mediatek,mt8173-vencsys", mtk_vencsys_init);
1109 CLK_OF_DECLARE(mtk_vencltsys, "mediatek,mt8173-vencltsys", mtk_vencltsys_init);