clk/ingenic/cgu.h

3  * Ingenic SoC CGU driver
19  * @reg: the offset of the PLL's control register within the CGU
41  * @bypass_reg: the offset of the bypass control register within the CGU
63  * @reg: offset of the mux control register within the CGU
76  * @reg: offset of the divider control register within the CGU
111  * @reg: offset of the gate control register within the CGU
136  *           within the clock_info array of the CGU, or -1 in entries
177  * struct ingenic_cgu - data about the CGU
178  * @np: the device tree node that caused the CGU to be probed
179  * @base: the ioremap'ed base address of the CGU registers
182  * @lock: lock to be held whilst manipulating CGU registers
197  * @cgu: a pointer to the CGU data
198  * @idx: the index of this clock in cgu->clock_info
202 	struct ingenic_cgu *cgu;  member
209  * ingenic_cgu_new() - create a new CGU instance
211  *              which are implemented by the CGU
213  * @np: the device tree node which causes this CGU to be probed
215  * Return: a pointer to the CGU instance if initialisation is successful,
224  * @cgu: pointer to cgu data
226  * Register the clocks described by the CGU with the common clock framework.
230 int ingenic_cgu_register_clocks(struct ingenic_cgu *cgu);