drivers/clk/clk-versaclock5.c

3  * Driver for IDT Versaclock 5
96 #define VC5_CLK_OUTPUT_CFG0_CFG_SHIFT	5
124 #define VC5_GLOBAL_REGISTER_GLOBAL_RESET	BIT(5)
135 #define VC5_MAX_CLK_OUT_NUM	5
420 	u8 fb[5];  in vc5_pll_recalc_rate()
422 	regmap_bulk_read(vc5->regmap, VC5_FEEDBACK_INT_DIV, fb, 5);  in vc5_pll_recalc_rate()
464 	u8 fb[5];  in vc5_pll_set_rate()
472 	return regmap_bulk_write(vc5->regmap, VC5_FEEDBACK_INT_DIV, fb, 5);  in vc5_pll_set_rate()
1097 	.clk_out_cnt = 5,
1111 	.clk_out_cnt = 5,
1118 	.clk_out_cnt = 5,
1125 	.clk_out_cnt = 5,
1130 	{ "5p49v5923", .driver_data = IDT_VC5_5P49V5923 },
1131 	{ "5p49v5925", .driver_data = IDT_VC5_5P49V5925 },
1132 	{ "5p49v5933", .driver_data = IDT_VC5_5P49V5933 },
1133 	{ "5p49v5935", .driver_data = IDT_VC5_5P49V5935 },
1134 	{ "5p49v6901", .driver_data = IDT_VC6_5P49V6901 },
1135 	{ "5p49v6965", .driver_data = IDT_VC6_5P49V6965 },
1141 	{ .compatible = "idt,5p49v5923", .data = &idt_5p49v5923_info },
1142 	{ .compatible = "idt,5p49v5925", .data = &idt_5p49v5925_info },
1143 	{ .compatible = "idt,5p49v5933", .data = &idt_5p49v5933_info },
1144 	{ .compatible = "idt,5p49v5935", .data = &idt_5p49v5935_info },
1145 	{ .compatible = "idt,5p49v6901", .data = &idt_5p49v6901_info },
1146 	{ .compatible = "idt,5p49v6965", .data = &idt_5p49v6965_info },
1166 MODULE_DESCRIPTION("IDT VersaClock 5 driver");