592 	struct bm1880_div_hw_clock *div_hw = to_bm1880_div_clk(hw);  in bm1880_clk_div_recalc_rate()  local
593 	struct bm1880_div_clock *div = &div_hw->div;  in bm1880_clk_div_recalc_rate()
594 	void __iomem *reg_addr = div_hw->base + div->reg;  in bm1880_clk_div_recalc_rate()
614 	struct bm1880_div_hw_clock *div_hw = to_bm1880_div_clk(hw);  in bm1880_clk_div_round_rate()  local
615 	struct bm1880_div_clock *div = &div_hw->div;  in bm1880_clk_div_round_rate()
616 	void __iomem *reg_addr = div_hw->base + div->reg;  in bm1880_clk_div_round_rate()
636 	struct bm1880_div_hw_clock *div_hw = to_bm1880_div_clk(hw);  in bm1880_clk_div_set_rate()  local
637 	struct bm1880_div_clock *div = &div_hw->div;  in bm1880_clk_div_set_rate()
638 	void __iomem *reg_addr = div_hw->base + div->reg;  in bm1880_clk_div_set_rate()
644 				div->width, div_hw->div.flags);  in bm1880_clk_div_set_rate()
648 	if (div_hw->lock)  in bm1880_clk_div_set_rate()
649 		spin_lock_irqsave(div_hw->lock, flags);  in bm1880_clk_div_set_rate()
651 		__acquire(div_hw->lock);  in bm1880_clk_div_set_rate()
654 	val &= ~(clk_div_mask(div->width) << div_hw->div.shift);  in bm1880_clk_div_set_rate()
658 	if (div_hw->lock)  in bm1880_clk_div_set_rate()
659 		spin_unlock_irqrestore(div_hw->lock, flags);  in bm1880_clk_div_set_rate()
661 		__release(div_hw->lock);  in bm1880_clk_div_set_rate()
761 	struct clk_hw *mux_hw = NULL, *gate_hw = NULL, *div_hw = NULL;  in bm1880_clk_register_composite()  local
820 		div_hw = &div_hws->hw;  in bm1880_clk_register_composite()
825 				       num_parents, mux_hw, mux_ops, div_hw,  in bm1880_clk_register_composite()