1 // SPDX-License-Identifier: GPL-2.0-only
9  * Baikal-T1 CCU Dividers clock driver
12 #define pr_fmt(fmt) "bt1-ccu-div: " fmt
17 #include <linux/clk-provider.h>
18 #include <linux/reset-controller.h>
26 #include <dt-bindings/clock/bt1-ccu.h>
27 #include <dt-bindings/reset/bt1-ccu.h>
29 #include "ccu-div.h"
138  * AXI Main Interconnect (axi_main_clk) and DDR AXI-bus (axi_ddr_clk) clocks
141  * the later is clocking the AXI-bus between DDR controller and the Main
197  * APB-bus clock is marked as critical since it's a main communication bus
198  * for the SoC devices registers IO-operations.
268 	for (idx = 0; idx < data->divs_num; ++idx) {  in ccu_div_find_desc()
269 		div = data->divs[idx];  in ccu_div_find_desc()
270 		if (div && div->id == clk_id)  in ccu_div_find_desc()
274 	return ERR_PTR(-EINVAL);  in ccu_div_find_desc()
285 	for (idx = 0, map = data->rst_map; idx < data->rst_num; ++idx, ++map) {  in ccu_div_reset()
286 		if (map->rst_id == rst_id)  in ccu_div_reset()
289 	if (idx == data->rst_num) {  in ccu_div_reset()
291 		return -EINVAL;  in ccu_div_reset()
294 	div = ccu_div_find_desc(data, map->clk_id);  in ccu_div_reset()
296 		pr_err("Invalid clock ID %d in mapping\n", map->clk_id);  in ccu_div_reset()
320 		return ERR_PTR(-ENOMEM);  in ccu_div_create_data()
322 	data->np = np;  in ccu_div_create_data()
323 	if (of_device_is_compatible(np, "baikal,bt1-ccu-axi")) {  in ccu_div_create_data()
324 		data->divs_num = ARRAY_SIZE(axi_info);  in ccu_div_create_data()
325 		data->divs_info = axi_info;  in ccu_div_create_data()
326 		data->rst_num = ARRAY_SIZE(axi_rst_map);  in ccu_div_create_data()
327 		data->rst_map = axi_rst_map;  in ccu_div_create_data()
328 	} else if (of_device_is_compatible(np, "baikal,bt1-ccu-sys")) {  in ccu_div_create_data()
329 		data->divs_num = ARRAY_SIZE(sys_info);  in ccu_div_create_data()
330 		data->divs_info = sys_info;  in ccu_div_create_data()
331 		data->rst_num = ARRAY_SIZE(sys_rst_map);  in ccu_div_create_data()
332 		data->rst_map = sys_rst_map;  in ccu_div_create_data()
336 		ret = -EINVAL;  in ccu_div_create_data()
340 	data->divs = kcalloc(data->divs_num, sizeof(*data->divs), GFP_KERNEL);  in ccu_div_create_data()
341 	if (!data->divs) {  in ccu_div_create_data()
342 		ret = -ENOMEM;  in ccu_div_create_data()
356 	kfree(data->divs);  in ccu_div_free_data()
363 	data->sys_regs = syscon_node_to_regmap(data->np->parent);  in ccu_div_find_sys_regs()
364 	if (IS_ERR(data->sys_regs)) {  in ccu_div_find_sys_regs()
366 			of_node_full_name(data->np));  in ccu_div_find_sys_regs()
367 		return PTR_ERR(data->sys_regs);  in ccu_div_find_sys_regs()
380 	clk_id = clkspec->args[0];  in ccu_div_of_clk_hw_get()
394 	for (idx = 0; idx < data->divs_num; ++idx) {  in ccu_div_clk_register()
395 		const struct ccu_div_info *info = &data->divs_info[idx];  in ccu_div_clk_register()
398 		init.id = info->id;  in ccu_div_clk_register()
399 		init.name = info->name;  in ccu_div_clk_register()
400 		init.parent_name = info->parent_name;  in ccu_div_clk_register()
401 		init.np = data->np;  in ccu_div_clk_register()
402 		init.type = info->type;  in ccu_div_clk_register()
403 		init.flags = info->flags;  in ccu_div_clk_register()
404 		init.features = info->features;  in ccu_div_clk_register()
407 			init.base = info->base;  in ccu_div_clk_register()
408 			init.sys_regs = data->sys_regs;  in ccu_div_clk_register()
409 			init.width = info->width;  in ccu_div_clk_register()
411 			init.base = info->base;  in ccu_div_clk_register()
412 			init.sys_regs = data->sys_regs;  in ccu_div_clk_register()
413 			init.divider = info->divider;  in ccu_div_clk_register()
415 			init.base = info->base;  in ccu_div_clk_register()
416 			init.sys_regs = data->sys_regs;  in ccu_div_clk_register()
418 			init.divider = info->divider;  in ccu_div_clk_register()
421 		data->divs[idx] = ccu_div_hw_register(&init);  in ccu_div_clk_register()
422 		if (IS_ERR(data->divs[idx])) {  in ccu_div_clk_register()
423 			ret = PTR_ERR(data->divs[idx]);  in ccu_div_clk_register()
430 	ret = of_clk_add_hw_provider(data->np, ccu_div_of_clk_hw_get, data);  in ccu_div_clk_register()
433 			of_node_full_name(data->np));  in ccu_div_clk_register()
440 	for (--idx; idx >= 0; --idx)  in ccu_div_clk_register()
441 		ccu_div_hw_unregister(data->divs[idx]);  in ccu_div_clk_register()
450 	of_clk_del_provider(data->np);  in ccu_div_clk_unregister()
452 	for (idx = 0; idx < data->divs_num; ++idx)  in ccu_div_clk_unregister()
453 		ccu_div_hw_unregister(data->divs[idx]);  in ccu_div_clk_unregister()
460 	data->rcdev.ops = &ccu_div_rst_ops;  in ccu_div_rst_register()
461 	data->rcdev.of_node = data->np;  in ccu_div_rst_register()
462 	data->rcdev.nr_resets = data->rst_num;  in ccu_div_rst_register()
464 	ret = reset_controller_register(&data->rcdev);  in ccu_div_rst_register()
467 			of_node_full_name(data->np));  in ccu_div_rst_register()
502 CLK_OF_DECLARE(ccu_axi, "baikal,bt1-ccu-axi", ccu_div_init);
503 CLK_OF_DECLARE(ccu_sys, "baikal,bt1-ccu-sys", ccu_div_init);