Lines Matching +full:bt1 +full:- +full:ccu
1 // SPDX-License-Identifier: GPL-2.0-only
9 * Baikal-T1 CCU Dividers interface driver
12 #define pr_fmt(fmt) "bt1-ccu-div: " fmt
19 #include <linux/clk-provider.h>
27 #include "ccu-div.h"
35 GENMASK((_width) + CCU_DIV_CTL_CLKDIV_FLD - 1, CCU_DIV_CTL_CLKDIV_FLD)
49 * getter available with non-constant mask support.
88 if (div->features & CCU_DIV_LOCK_SHIFTED) in ccu_div_var_update_clkdiv()
93 regmap_update_bits(div->sys_regs, div->reg_ctl, in ccu_div_var_update_clkdiv()
97 * Until there is nsec-version of readl_poll_timeout() is available in ccu_div_var_update_clkdiv()
103 regmap_read(div->sys_regs, div->reg_ctl, &val); in ccu_div_var_update_clkdiv()
106 } while (--count); in ccu_div_var_update_clkdiv()
108 return -ETIMEDOUT; in ccu_div_var_update_clkdiv()
121 return -EINVAL; in ccu_div_var_enable()
124 regmap_read(div->sys_regs, div->reg_ctl, &val); in ccu_div_var_enable()
128 spin_lock_irqsave(&div->lock, flags); in ccu_div_var_enable()
130 ccu_div_get(div->mask, val)); in ccu_div_var_enable()
132 regmap_update_bits(div->sys_regs, div->reg_ctl, in ccu_div_var_enable()
134 spin_unlock_irqrestore(&div->lock, flags); in ccu_div_var_enable()
146 spin_lock_irqsave(&div->lock, flags); in ccu_div_gate_enable()
147 regmap_update_bits(div->sys_regs, div->reg_ctl, in ccu_div_gate_enable()
149 spin_unlock_irqrestore(&div->lock, flags); in ccu_div_gate_enable()
159 spin_lock_irqsave(&div->lock, flags); in ccu_div_gate_disable()
160 regmap_update_bits(div->sys_regs, div->reg_ctl, CCU_DIV_CTL_EN, 0); in ccu_div_gate_disable()
161 spin_unlock_irqrestore(&div->lock, flags); in ccu_div_gate_disable()
169 regmap_read(div->sys_regs, div->reg_ctl, &val); in ccu_div_gate_is_enabled()
179 spin_lock_irqsave(&div->lock, flags); in ccu_div_buf_enable()
180 regmap_update_bits(div->sys_regs, div->reg_ctl, in ccu_div_buf_enable()
182 spin_unlock_irqrestore(&div->lock, flags); in ccu_div_buf_enable()
192 spin_lock_irqsave(&div->lock, flags); in ccu_div_buf_disable()
193 regmap_update_bits(div->sys_regs, div->reg_ctl, in ccu_div_buf_disable()
195 spin_unlock_irqrestore(&div->lock, flags); in ccu_div_buf_disable()
203 regmap_read(div->sys_regs, div->reg_ctl, &val); in ccu_div_buf_is_enabled()
215 regmap_read(div->sys_regs, div->reg_ctl, &val); in ccu_div_var_recalc_rate()
216 divider = ccu_div_get(div->mask, val); in ccu_div_var_recalc_rate()
238 divider = ccu_div_var_calc_divider(rate, *parent_rate, div->mask); in ccu_div_var_round_rate()
245 * on-the-fly rate change. So due to lacking the EN bit functionality
256 divider = ccu_div_var_calc_divider(rate, parent_rate, div->mask); in ccu_div_var_set_rate_slow()
257 if (divider == 1 && div->features & CCU_DIV_SKIP_ONE) { in ccu_div_var_set_rate_slow()
259 } else if (div->features & CCU_DIV_SKIP_ONE_TO_THREE) { in ccu_div_var_set_rate_slow()
266 val = ccu_div_prep(div->mask, divider); in ccu_div_var_set_rate_slow()
268 spin_lock_irqsave(&div->lock, flags); in ccu_div_var_set_rate_slow()
269 regmap_update_bits(div->sys_regs, div->reg_ctl, div->mask, val); in ccu_div_var_set_rate_slow()
271 spin_unlock_irqrestore(&div->lock, flags); in ccu_div_var_set_rate_slow()
280 * the on-the-fly rate change.
289 divider = ccu_div_var_calc_divider(rate, parent_rate, div->mask); in ccu_div_var_set_rate_fast()
290 val = ccu_div_prep(div->mask, divider); in ccu_div_var_set_rate_fast()
296 spin_lock_irqsave(&div->lock, flags); in ccu_div_var_set_rate_fast()
297 regmap_update_bits(div->sys_regs, div->reg_ctl, in ccu_div_var_set_rate_fast()
298 div->mask | CCU_DIV_CTL_EN, val); in ccu_div_var_set_rate_fast()
299 spin_unlock_irqrestore(&div->lock, flags); in ccu_div_var_set_rate_fast()
309 return ccu_div_calc_freq(parent_rate, div->divider); in ccu_div_fixed_recalc_rate()
317 return ccu_div_calc_freq(*parent_rate, div->divider); in ccu_div_fixed_round_rate()
330 if (!div || !(div->features & CCU_DIV_RESET_DOMAIN)) in ccu_div_reset_domain()
331 return -EINVAL; in ccu_div_reset_domain()
333 spin_lock_irqsave(&div->lock, flags); in ccu_div_reset_domain()
334 regmap_update_bits(div->sys_regs, div->reg_ctl, in ccu_div_reset_domain()
336 spin_unlock_irqrestore(&div->lock, flags); in ccu_div_reset_domain()
378 struct ccu_div *div = bit->div; in ccu_div_dbgfs_bit_set()
381 spin_lock_irqsave(&div->lock, flags); in ccu_div_dbgfs_bit_set()
382 regmap_update_bits(div->sys_regs, div->reg_ctl, in ccu_div_dbgfs_bit_set()
383 bit->mask, val ? bit->mask : 0); in ccu_div_dbgfs_bit_set()
384 spin_unlock_irqrestore(&div->lock, flags); in ccu_div_dbgfs_bit_set()
396 CCU_DIV_CLKDIV_MAX(div->mask)); in ccu_div_dbgfs_var_clkdiv_set()
397 data = ccu_div_prep(div->mask, val); in ccu_div_dbgfs_var_clkdiv_set()
399 spin_lock_irqsave(&div->lock, flags); in ccu_div_dbgfs_var_clkdiv_set()
400 regmap_update_bits(div->sys_regs, div->reg_ctl, div->mask, data); in ccu_div_dbgfs_var_clkdiv_set()
401 spin_unlock_irqrestore(&div->lock, flags); in ccu_div_dbgfs_var_clkdiv_set()
419 struct ccu_div *div = bit->div; in ccu_div_dbgfs_bit_get()
422 regmap_read(div->sys_regs, div->reg_ctl, &data); in ccu_div_dbgfs_bit_get()
423 *val = !!(data & bit->mask); in ccu_div_dbgfs_bit_get()
435 regmap_read(div->sys_regs, div->reg_ctl, &data); in ccu_div_dbgfs_var_clkdiv_get()
436 *val = ccu_div_get(div->mask, data); in ccu_div_dbgfs_var_clkdiv_get()
447 *val = div->divider; in ccu_div_dbgfs_fixed_clkdiv_get()
461 num += !!(div->flags & CLK_SET_RATE_GATE) + in ccu_div_var_debug_init()
462 !!(div->features & CCU_DIV_RESET_DOMAIN); in ccu_div_var_debug_init()
470 if (!(div->flags & CLK_SET_RATE_GATE) && in ccu_div_var_debug_init()
475 if (!(div->features & CCU_DIV_RESET_DOMAIN) && in ccu_div_var_debug_init()
486 if (div->features & CCU_DIV_LOCK_SHIFTED && in ccu_div_var_debug_init()
511 bit->div = div; in ccu_div_gate_debug_init()
512 debugfs_create_file_unsafe(bit->name, ccu_div_dbgfs_mode, dentry, bit, in ccu_div_gate_debug_init()
529 bit->div = div; in ccu_div_buf_debug_init()
530 debugfs_create_file_unsafe(bit->name, ccu_div_dbgfs_mode, dentry, bit, in ccu_div_buf_debug_init()
600 return ERR_PTR(-EINVAL); in ccu_div_hw_register()
604 return ERR_PTR(-ENOMEM); in ccu_div_hw_register()
607 * Note since Baikal-T1 System Controller registers are MMIO-backed in ccu_div_hw_register()
611 div->hw.init = &hw_init; in ccu_div_hw_register()
612 div->id = div_init->id; in ccu_div_hw_register()
613 div->reg_ctl = div_init->base + CCU_DIV_CTL; in ccu_div_hw_register()
614 div->sys_regs = div_init->sys_regs; in ccu_div_hw_register()
615 div->flags = div_init->flags; in ccu_div_hw_register()
616 div->features = div_init->features; in ccu_div_hw_register()
617 spin_lock_init(&div->lock); in ccu_div_hw_register()
619 hw_init.name = div_init->name; in ccu_div_hw_register()
620 hw_init.flags = div_init->flags; in ccu_div_hw_register()
622 if (div_init->type == CCU_DIV_VAR) { in ccu_div_hw_register()
627 div->mask = CCU_DIV_CTL_CLKDIV_MASK(div_init->width); in ccu_div_hw_register()
628 } else if (div_init->type == CCU_DIV_GATE) { in ccu_div_hw_register()
630 div->divider = div_init->divider; in ccu_div_hw_register()
631 } else if (div_init->type == CCU_DIV_BUF) { in ccu_div_hw_register()
633 } else if (div_init->type == CCU_DIV_FIXED) { in ccu_div_hw_register()
635 div->divider = div_init->divider; in ccu_div_hw_register()
637 ret = -EINVAL; in ccu_div_hw_register()
641 if (!div_init->parent_name) { in ccu_div_hw_register()
642 ret = -EINVAL; in ccu_div_hw_register()
645 parent_data.fw_name = div_init->parent_name; in ccu_div_hw_register()
646 parent_data.name = div_init->parent_name; in ccu_div_hw_register()
650 ret = of_clk_hw_register(div_init->np, &div->hw); in ccu_div_hw_register()
664 clk_hw_unregister(&div->hw); in ccu_div_hw_unregister()