49 	struct clk_peripheral *periph = to_clk_peripheral(hw);  in clk_peripheral_enable()  local
51 	u32 id = periph->id;  in clk_peripheral_enable()
57 	regmap_write(periph->regmap, offset, PERIPHERAL_MASK(id));  in clk_peripheral_enable()
64 	struct clk_peripheral *periph = to_clk_peripheral(hw);  in clk_peripheral_disable()  local
66 	u32 id = periph->id;  in clk_peripheral_disable()
72 	regmap_write(periph->regmap, offset, PERIPHERAL_MASK(id));  in clk_peripheral_disable()
77 	struct clk_peripheral *periph = to_clk_peripheral(hw);  in clk_peripheral_is_enabled()  local
80 	u32 id = periph->id;  in clk_peripheral_is_enabled()
86 	regmap_read(periph->regmap, offset, &status);  in clk_peripheral_is_enabled()
101 	struct clk_peripheral *periph;  in at91_clk_register_peripheral()  local
109 	periph = kzalloc(sizeof(*periph), GFP_KERNEL);  in at91_clk_register_peripheral()
110 	if (!periph)  in at91_clk_register_peripheral()
119 	periph->id = id;  in at91_clk_register_peripheral()
120 	periph->hw.init = &init;  in at91_clk_register_peripheral()
121 	periph->regmap = regmap;  in at91_clk_register_peripheral()
123 	hw = &periph->hw;  in at91_clk_register_peripheral()
124 	ret = clk_hw_register(NULL, &periph->hw);  in at91_clk_register_peripheral()
126 		kfree(periph);  in at91_clk_register_peripheral()
133 static void clk_sam9x5_peripheral_autodiv(struct clk_sam9x5_peripheral *periph)  in clk_sam9x5_peripheral_autodiv()  argument
139 	if (!periph->auto_div)  in clk_sam9x5_peripheral_autodiv()
142 	if (periph->range.max) {  in clk_sam9x5_peripheral_autodiv()
143 		parent = clk_hw_get_parent_by_index(&periph->hw, 0);  in clk_sam9x5_peripheral_autodiv()
149 			if (parent_rate >> shift <= periph->range.max)  in clk_sam9x5_peripheral_autodiv()
154 	periph->auto_div = false;  in clk_sam9x5_peripheral_autodiv()
155 	periph->div = shift;  in clk_sam9x5_peripheral_autodiv()
160 	struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);  in clk_sam9x5_peripheral_enable()  local
163 	if (periph->id < PERIPHERAL_ID_MIN)  in clk_sam9x5_peripheral_enable()
166 	spin_lock_irqsave(periph->lock, flags);  in clk_sam9x5_peripheral_enable()
167 	regmap_write(periph->regmap, periph->layout->offset,  in clk_sam9x5_peripheral_enable()
168 		     (periph->id & periph->layout->pid_mask));  in clk_sam9x5_peripheral_enable()
169 	regmap_update_bits(periph->regmap, periph->layout->offset,  in clk_sam9x5_peripheral_enable()
170 			   periph->layout->div_mask | periph->layout->cmd |  in clk_sam9x5_peripheral_enable()
172 			   field_prep(periph->layout->div_mask, periph->div) |  in clk_sam9x5_peripheral_enable()
173 			   periph->layout->cmd |  in clk_sam9x5_peripheral_enable()
175 	spin_unlock_irqrestore(periph->lock, flags);  in clk_sam9x5_peripheral_enable()
182 	struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);  in clk_sam9x5_peripheral_disable()  local
185 	if (periph->id < PERIPHERAL_ID_MIN)  in clk_sam9x5_peripheral_disable()
188 	spin_lock_irqsave(periph->lock, flags);  in clk_sam9x5_peripheral_disable()
189 	regmap_write(periph->regmap, periph->layout->offset,  in clk_sam9x5_peripheral_disable()
190 		     (periph->id & periph->layout->pid_mask));  in clk_sam9x5_peripheral_disable()
191 	regmap_update_bits(periph->regmap, periph->layout->offset,  in clk_sam9x5_peripheral_disable()
192 			   AT91_PMC_PCR_EN | periph->layout->cmd,  in clk_sam9x5_peripheral_disable()
193 			   periph->layout->cmd);  in clk_sam9x5_peripheral_disable()
194 	spin_unlock_irqrestore(periph->lock, flags);  in clk_sam9x5_peripheral_disable()
199 	struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);  in clk_sam9x5_peripheral_is_enabled()  local
203 	if (periph->id < PERIPHERAL_ID_MIN)  in clk_sam9x5_peripheral_is_enabled()
206 	spin_lock_irqsave(periph->lock, flags);  in clk_sam9x5_peripheral_is_enabled()
207 	regmap_write(periph->regmap, periph->layout->offset,  in clk_sam9x5_peripheral_is_enabled()
208 		     (periph->id & periph->layout->pid_mask));  in clk_sam9x5_peripheral_is_enabled()
209 	regmap_read(periph->regmap, periph->layout->offset, &status);  in clk_sam9x5_peripheral_is_enabled()
210 	spin_unlock_irqrestore(periph->lock, flags);  in clk_sam9x5_peripheral_is_enabled()
219 	struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);  in clk_sam9x5_peripheral_recalc_rate()  local
223 	if (periph->id < PERIPHERAL_ID_MIN)  in clk_sam9x5_peripheral_recalc_rate()
226 	spin_lock_irqsave(periph->lock, flags);  in clk_sam9x5_peripheral_recalc_rate()
227 	regmap_write(periph->regmap, periph->layout->offset,  in clk_sam9x5_peripheral_recalc_rate()
228 		     (periph->id & periph->layout->pid_mask));  in clk_sam9x5_peripheral_recalc_rate()
229 	regmap_read(periph->regmap, periph->layout->offset, &status);  in clk_sam9x5_peripheral_recalc_rate()
230 	spin_unlock_irqrestore(periph->lock, flags);  in clk_sam9x5_peripheral_recalc_rate()
233 		periph->div = field_get(periph->layout->div_mask, status);  in clk_sam9x5_peripheral_recalc_rate()
234 		periph->auto_div = false;  in clk_sam9x5_peripheral_recalc_rate()
236 		clk_sam9x5_peripheral_autodiv(periph);  in clk_sam9x5_peripheral_recalc_rate()
239 	return parent_rate >> periph->div;  in clk_sam9x5_peripheral_recalc_rate()
262 	struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);  in clk_sam9x5_peripheral_determine_rate()  local
271 	if (periph->id < PERIPHERAL_ID_MIN || !periph->range.max)  in clk_sam9x5_peripheral_determine_rate()
278 		if (periph->range.max && tmp_rate > periph->range.max)  in clk_sam9x5_peripheral_determine_rate()
288 	if (periph->chg_pid < 0)  in clk_sam9x5_peripheral_determine_rate()
292 	parent = clk_hw_get_parent_by_index(hw, periph->chg_pid);  in clk_sam9x5_peripheral_determine_rate()
310 	    (periph->range.max && best_rate > periph->range.max))  in clk_sam9x5_peripheral_determine_rate()
332 	struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);  in clk_sam9x5_peripheral_round_rate()  local
334 	if (periph->id < PERIPHERAL_ID_MIN || !periph->range.max)  in clk_sam9x5_peripheral_round_rate()
337 	if (periph->range.max) {  in clk_sam9x5_peripheral_round_rate()
340 			if (cur_rate <= periph->range.max)  in clk_sam9x5_peripheral_round_rate()
374 	struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);  in clk_sam9x5_peripheral_set_rate()  local
375 	if (periph->id < PERIPHERAL_ID_MIN || !periph->range.max) {  in clk_sam9x5_peripheral_set_rate()
382 	if (periph->range.max && rate > periph->range.max)  in clk_sam9x5_peripheral_set_rate()
387 			periph->auto_div = false;  in clk_sam9x5_peripheral_set_rate()
388 			periph->div = shift;  in clk_sam9x5_peripheral_set_rate()
421 	struct clk_sam9x5_peripheral *periph;  in at91_clk_register_sam9x5_peripheral()  local
429 	periph = kzalloc(sizeof(*periph), GFP_KERNEL);  in at91_clk_register_sam9x5_peripheral()
430 	if (!periph)  in at91_clk_register_sam9x5_peripheral()
445 	periph->id = id;  in at91_clk_register_sam9x5_peripheral()
446 	periph->hw.init = &init;  in at91_clk_register_sam9x5_peripheral()
447 	periph->div = 0;  in at91_clk_register_sam9x5_peripheral()
448 	periph->regmap = regmap;  in at91_clk_register_sam9x5_peripheral()
449 	periph->lock = lock;  in at91_clk_register_sam9x5_peripheral()
451 		periph->auto_div = true;  in at91_clk_register_sam9x5_peripheral()
452 	periph->layout = layout;  in at91_clk_register_sam9x5_peripheral()
453 	periph->range = *range;  in at91_clk_register_sam9x5_peripheral()
454 	periph->chg_pid = chg_pid;  in at91_clk_register_sam9x5_peripheral()
456 	hw = &periph->hw;  in at91_clk_register_sam9x5_peripheral()
457 	ret = clk_hw_register(NULL, &periph->hw);  in at91_clk_register_sam9x5_peripheral()
459 		kfree(periph);  in at91_clk_register_sam9x5_peripheral()
462 		clk_sam9x5_peripheral_autodiv(periph);  in at91_clk_register_sam9x5_peripheral()