213 	cgcr = ioread32(port_mmio(ap, PDC_GLOBAL_CTL));  in pdc2027x_cable_detect()
307 	ctcr0 = ioread32(dev_mmio(ap, adev, PDC_CTCR0));  in pdc2027x_set_piomode()
313 	ctcr1 = ioread32(dev_mmio(ap, adev, PDC_CTCR1));  in pdc2027x_set_piomode()
349 			ctcr1 = ioread32(dev_mmio(ap, adev, PDC_CTCR1));  in pdc2027x_set_dmamode()
355 		ctcr1 = ioread32(dev_mmio(ap, adev, PDC_CTCR1));  in pdc2027x_set_dmamode()
372 		ctcr0 = ioread32(dev_mmio(ap, adev, PDC_CTCR0));  in pdc2027x_set_dmamode()
413 			u32 ctcr1 = ioread32(dev_mmio(ap, dev, PDC_CTCR1));  in pdc2027x_set_mode()
479 	bccrl = ioread32(mmio_base + PDC_BYTE_COUNT) & 0x7fff;  in pdc_read_counter()
480 	bccrh = ioread32(mmio_base + PDC_BYTE_COUNT + 0x100) & 0x7fff;  in pdc_read_counter()
483 	bccrlv = ioread32(mmio_base + PDC_BYTE_COUNT) & 0x7fff;  in pdc_read_counter()
484 	bccrhv = ioread32(mmio_base + PDC_BYTE_COUNT + 0x100) & 0x7fff;  in pdc_read_counter()
607 	scr = ioread32(mmio_base + PDC_SYS_CTL);  in pdc_detect_pll_input_clock()
610 	ioread32(mmio_base + PDC_SYS_CTL); /* flush */  in pdc_detect_pll_input_clock()
624 	scr = ioread32(mmio_base + PDC_SYS_CTL);  in pdc_detect_pll_input_clock()
627 	ioread32(mmio_base + PDC_SYS_CTL); /* flush */  in pdc_detect_pll_input_clock()