Lines Matching refs:pt_desc
1178 !(vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN); in pt_can_write_msr()
1224 rdmsrl(MSR_IA32_RTIT_CTL, vmx->pt_desc.host.ctl); in pt_guest_enter()
1225 if (vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) { in pt_guest_enter()
1227 pt_save_msr(&vmx->pt_desc.host, vmx->pt_desc.addr_range); in pt_guest_enter()
1228 pt_load_msr(&vmx->pt_desc.guest, vmx->pt_desc.addr_range); in pt_guest_enter()
1237 if (vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) { in pt_guest_exit()
1238 pt_save_msr(&vmx->pt_desc.guest, vmx->pt_desc.addr_range); in pt_guest_exit()
1239 pt_load_msr(&vmx->pt_desc.host, vmx->pt_desc.addr_range); in pt_guest_exit()
1243 wrmsrl(MSR_IA32_RTIT_CTL, vmx->pt_desc.host.ctl); in pt_guest_exit()
1578 if (data & vmx->pt_desc.ctl_bitmask) in vmx_rtit_ctl_check()
1585 if ((vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) && in vmx_rtit_ctl_check()
1586 ((vmx->pt_desc.guest.ctl ^ data) & ~RTIT_CTL_TRACEEN)) in vmx_rtit_ctl_check()
1596 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_rtit_ctl_check()
1604 value = intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_mtc_periods); in vmx_rtit_ctl_check()
1605 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_mtc) && in vmx_rtit_ctl_check()
1609 value = intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_rtit_ctl_check()
1611 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_psb_cyc) && in vmx_rtit_ctl_check()
1615 value = intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_psb_periods); in vmx_rtit_ctl_check()
1616 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_psb_cyc) && in vmx_rtit_ctl_check()
1626 if ((value && (vmx->pt_desc.addr_range < 1)) || (value > 2)) in vmx_rtit_ctl_check()
1629 if ((value && (vmx->pt_desc.addr_range < 2)) || (value > 2)) in vmx_rtit_ctl_check()
1632 if ((value && (vmx->pt_desc.addr_range < 3)) || (value > 2)) in vmx_rtit_ctl_check()
1635 if ((value && (vmx->pt_desc.addr_range < 4)) || (value > 2)) in vmx_rtit_ctl_check()
1969 msr_info->data = vmx->pt_desc.guest.ctl; in vmx_get_msr()
1974 msr_info->data = vmx->pt_desc.guest.status; in vmx_get_msr()
1978 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_get_msr()
1981 msr_info->data = vmx->pt_desc.guest.cr3_match; in vmx_get_msr()
1985 (!intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_get_msr()
1987 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_get_msr()
1990 msr_info->data = vmx->pt_desc.guest.output_base; in vmx_get_msr()
1994 (!intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_get_msr()
1996 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_get_msr()
1999 msr_info->data = vmx->pt_desc.guest.output_mask; in vmx_get_msr()
2004 (index >= 2 * intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_get_msr()
2008 msr_info->data = vmx->pt_desc.guest.addr_b[index / 2]; in vmx_get_msr()
2010 msr_info->data = vmx->pt_desc.guest.addr_a[index / 2]; in vmx_get_msr()
2227 vmx->pt_desc.guest.ctl = data; in vmx_set_msr()
2235 vmx->pt_desc.guest.status = data; in vmx_set_msr()
2240 if (!intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_set_msr()
2243 vmx->pt_desc.guest.cr3_match = data; in vmx_set_msr()
2248 if (!intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_set_msr()
2250 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_set_msr()
2255 vmx->pt_desc.guest.output_base = data; in vmx_set_msr()
2260 if (!intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_set_msr()
2262 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_set_msr()
2265 vmx->pt_desc.guest.output_mask = data; in vmx_set_msr()
2271 if (index >= 2 * intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_set_msr()
2277 vmx->pt_desc.guest.addr_b[index / 2] = data; in vmx_set_msr()
2279 vmx->pt_desc.guest.addr_a[index / 2] = data; in vmx_set_msr()
3958 bool flag = !(vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN); in pt_update_intercept_for_msr()
3965 for (i = 0; i < vmx->pt_desc.addr_range; i++) { in pt_update_intercept_for_msr()
4475 memset(&vmx->pt_desc, 0, sizeof(vmx->pt_desc)); in init_vmcs()
4477 vmx->pt_desc.guest.output_mask = 0x7F; in init_vmcs()
7304 vmx->pt_desc.caps[CPUID_EAX + i*PT_CPUID_REGS_NUM] = best->eax; in update_intel_pt_cfg()
7305 vmx->pt_desc.caps[CPUID_EBX + i*PT_CPUID_REGS_NUM] = best->ebx; in update_intel_pt_cfg()
7306 vmx->pt_desc.caps[CPUID_ECX + i*PT_CPUID_REGS_NUM] = best->ecx; in update_intel_pt_cfg()
7307 vmx->pt_desc.caps[CPUID_EDX + i*PT_CPUID_REGS_NUM] = best->edx; in update_intel_pt_cfg()
7311 vmx->pt_desc.addr_range = intel_pt_validate_cap(vmx->pt_desc.caps, in update_intel_pt_cfg()
7315 vmx->pt_desc.ctl_bitmask = ~(RTIT_CTL_TRACEEN | RTIT_CTL_OS | in update_intel_pt_cfg()
7322 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_cr3_filtering)) in update_intel_pt_cfg()
7323 vmx->pt_desc.ctl_bitmask &= ~RTIT_CTL_CR3EN; in update_intel_pt_cfg()
7329 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_psb_cyc)) in update_intel_pt_cfg()
7330 vmx->pt_desc.ctl_bitmask &= ~(RTIT_CTL_CYCLEACC | in update_intel_pt_cfg()
7337 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_mtc)) in update_intel_pt_cfg()
7338 vmx->pt_desc.ctl_bitmask &= ~(RTIT_CTL_MTC_EN | in update_intel_pt_cfg()
7342 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_ptwrite)) in update_intel_pt_cfg()
7343 vmx->pt_desc.ctl_bitmask &= ~(RTIT_CTL_FUP_ON_PTW | in update_intel_pt_cfg()
7347 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_power_event_trace)) in update_intel_pt_cfg()
7348 vmx->pt_desc.ctl_bitmask &= ~RTIT_CTL_PWR_EVT_EN; in update_intel_pt_cfg()
7351 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_topa_output)) in update_intel_pt_cfg()
7352 vmx->pt_desc.ctl_bitmask &= ~RTIT_CTL_TOPA; in update_intel_pt_cfg()
7355 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_output_subsys)) in update_intel_pt_cfg()
7356 vmx->pt_desc.ctl_bitmask &= ~RTIT_CTL_FABRIC_EN; in update_intel_pt_cfg()
7359 for (i = 0; i < vmx->pt_desc.addr_range; i++) in update_intel_pt_cfg()
7360 vmx->pt_desc.ctl_bitmask &= ~(0xfULL << (32 + i * 4)); in update_intel_pt_cfg()