Lines Matching +full:ecx +full:- +full:1000
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * This module enables machines with Intel VT-x extensions to run virtual
30 #include <linux/entry-kvm.h>
48 #include <asm/spec-ctrl.h>
125 /* Guest_tsc -> host_tsc conversion requires 64-bit division. */
175 * These 2 parameters are used to config the controls for Pause-Loop Exiting:
191 /* Default doubles per-vcpu window every exit. */
195 /* Default resets per-vcpu window every exit to ple_window. */
203 /* Default is SYSTEM mode, 1 for host-guest mode */
285 return -ENOMEM; in vmx_setup_l1d_flush()
324 return -EINVAL; in vmentry_l1d_flush_parse()
380 if (!vmx->disable_fb_clear) in vmx_disable_fb_clear()
387 vmx->msr_ia32_mcu_opt_ctrl = msr; in vmx_disable_fb_clear()
392 if (!vmx->disable_fb_clear) in vmx_enable_fb_clear()
395 vmx->msr_ia32_mcu_opt_ctrl &= ~FB_CLEAR_DIS; in vmx_enable_fb_clear()
396 native_wrmsrl(MSR_IA32_MCU_OPT_CTRL, vmx->msr_ia32_mcu_opt_ctrl); in vmx_enable_fb_clear()
401 vmx->disable_fb_clear = vmx_fb_clear_ctrl_available; in vmx_update_fb_clear_dis()
408 if ((vcpu->arch.arch_capabilities & ARCH_CAP_FB_CLEAR) || in vmx_update_fb_clear_dis()
409 ((vcpu->arch.arch_capabilities & ARCH_CAP_MDS_NO) && in vmx_update_fb_clear_dis()
410 (vcpu->arch.arch_capabilities & ARCH_CAP_TAA_NO) && in vmx_update_fb_clear_dis()
411 (vcpu->arch.arch_capabilities & ARCH_CAP_PSDP_NO) && in vmx_update_fb_clear_dis()
412 (vcpu->arch.arch_capabilities & ARCH_CAP_FBSDP_NO) && in vmx_update_fb_clear_dis()
413 (vcpu->arch.arch_capabilities & ARCH_CAP_SBDR_SSDP_NO))) in vmx_update_fb_clear_dis()
414 vmx->disable_fb_clear = false; in vmx_update_fb_clear_dis()
474 * We maintain a per-CPU linked-list of VMCS loaded on that CPU. This is needed
511 vmx->segment_cache.bitmask = 0; in vmx_segment_cache_clear()
517 * Though SYSCALL is only supported in 64-bit mode on Intel CPUs, kvm
519 * CPUID.0:{EBX,ECX,EDX} is "AuthenticAMD" or "AMDisbetter!" To
544 tmp_eptp = to_vmx(vcpu)->ept_pointer; in check_ept_pointer_match()
545 } else if (tmp_eptp != to_vmx(vcpu)->ept_pointer) { in check_ept_pointer_match()
546 to_kvm_vmx(kvm)->ept_pointers_match in check_ept_pointer_match()
552 to_kvm_vmx(kvm)->ept_pointers_match = EPT_POINTERS_MATCH; in check_ept_pointer_match()
560 return hyperv_fill_flush_guest_mapping_list(flush, range->start_gfn, in kvm_fill_hv_flush_list_func()
561 range->pages); in kvm_fill_hv_flush_list_func()
567 u64 ept_pointer = to_vmx(vcpu)->ept_pointer; in __hv_remote_flush_tlb_with_range()
587 spin_lock(&to_kvm_vmx(kvm)->ept_pointer_lock); in hv_remote_flush_tlb_with_range()
589 if (to_kvm_vmx(kvm)->ept_pointers_match == EPT_POINTERS_CHECK) in hv_remote_flush_tlb_with_range()
592 if (to_kvm_vmx(kvm)->ept_pointers_match != EPT_POINTERS_MATCH) { in hv_remote_flush_tlb_with_range()
595 if (VALID_PAGE(to_vmx(vcpu)->ept_pointer)) in hv_remote_flush_tlb_with_range()
604 spin_unlock(&to_kvm_vmx(kvm)->ept_pointer_lock); in hv_remote_flush_tlb_with_range()
616 &vcpu->kvm->arch.hyperv.hv_pa_pg; in hv_enable_direct_tlbflush()
618 * Synthetic VM-Exit is not enabled in current code and so All in hv_enable_direct_tlbflush()
625 return -ENOMEM; in hv_enable_direct_tlbflush()
627 evmcs = (struct hv_enlightened_vmcs *)to_vmx(vcpu)->loaded_vmcs->vmcs; in hv_enable_direct_tlbflush()
629 evmcs->partition_assist_page = in hv_enable_direct_tlbflush()
631 evmcs->hv_vm_id = (unsigned long)vcpu->kvm; in hv_enable_direct_tlbflush()
632 evmcs->hv_enlightenments_control.nested_flush_hypercall = 1; in hv_enable_direct_tlbflush()
640 * Comment's format: document - errata name - stepping - processor name.
645 /* 323344.pdf - BA86 - D0 - Xeon 7500 Series */
647 /* 323056.pdf - AAX65 - C2 - Xeon L3406 */
648 /* 322814.pdf - AAT59 - C2 - i7-600, i5-500, i5-400 and i3-300 Mobile */
649 /* 322911.pdf - AAU65 - C2 - i5-600, i3-500 Desktop and Pentium G6950 */
651 /* 322911.pdf - AAU65 - K0 - i5-600, i3-500 Desktop and Pentium G6950 */
653 /* 322373.pdf - AAO95 - B1 - Xeon 3400 Series */
654 /* 322166.pdf - AAN92 - B1 - i7-800 and i5-700 Desktop */
656 * 320767.pdf - AAP86 - B1 -
657 * i7-900 Mobile Extreme, i7-800 and i7-700 Mobile
660 /* 321333.pdf - AAM126 - C0 - Xeon 3500 */
662 /* 321333.pdf - AAM126 - C1 - Xeon 3500 */
664 /* 320836.pdf - AAJ124 - C0 - i7-900 Desktop Extreme and i7-900 Desktop */
666 /* 321333.pdf - AAM126 - D0 - Xeon 3500 */
667 /* 321324.pdf - AAK139 - D0 - Xeon 5500 */
668 /* 320836.pdf - AAJ124 - D0 - i7-900 Extreme and i7-900 Desktop */
670 /* Xeon E3-1220 V2 */
705 return -ENOENT; in possible_passthrough_msr_slot()
725 r = possible_passthrough_msr_slot(msr) != -ENOENT; in is_valid_passthrough_msr()
736 for (i = 0; i < vmx->nr_uret_msrs; ++i) in __vmx_find_uret_msr()
737 if (vmx_uret_msrs_list[vmx->guest_uret_msrs[i].slot] == msr) in __vmx_find_uret_msr()
739 return -1; in __vmx_find_uret_msr()
748 return &vmx->guest_uret_msrs[i]; in vmx_find_uret_msr()
757 u64 old_msr_data = msr->data; in vmx_set_guest_uret_msr()
758 msr->data = data; in vmx_set_guest_uret_msr()
759 if (msr - vmx->guest_uret_msrs < vmx->nr_active_uret_msrs) { in vmx_set_guest_uret_msr()
761 ret = kvm_set_user_return_msr(msr->slot, msr->data, msr->mask); in vmx_set_guest_uret_msr()
764 msr->data = old_msr_data; in vmx_set_guest_uret_msr()
777 vmcs_clear(v->vmcs); in crash_vmclear_local_loaded_vmcss()
786 if (loaded_vmcs->cpu != cpu) in __loaded_vmcs_clear()
788 if (per_cpu(current_vmcs, cpu) == loaded_vmcs->vmcs) in __loaded_vmcs_clear()
791 vmcs_clear(loaded_vmcs->vmcs); in __loaded_vmcs_clear()
792 if (loaded_vmcs->shadow_vmcs && loaded_vmcs->launched) in __loaded_vmcs_clear()
793 vmcs_clear(loaded_vmcs->shadow_vmcs); in __loaded_vmcs_clear()
795 list_del(&loaded_vmcs->loaded_vmcss_on_cpu_link); in __loaded_vmcs_clear()
799 * current percpu list, complete before setting loaded_vmcs->vcpu to in __loaded_vmcs_clear()
800 * -1, otherwise a different cpu can see vcpu == -1 first and add in __loaded_vmcs_clear()
806 loaded_vmcs->cpu = -1; in __loaded_vmcs_clear()
807 loaded_vmcs->launched = 0; in __loaded_vmcs_clear()
812 int cpu = loaded_vmcs->cpu; in loaded_vmcs_clear()
814 if (cpu != -1) in loaded_vmcs_clear()
825 if (!kvm_register_is_available(&vmx->vcpu, VCPU_EXREG_SEGMENTS)) { in vmx_segment_cache_test_set()
826 kvm_register_mark_available(&vmx->vcpu, VCPU_EXREG_SEGMENTS); in vmx_segment_cache_test_set()
827 vmx->segment_cache.bitmask = 0; in vmx_segment_cache_test_set()
829 ret = vmx->segment_cache.bitmask & mask; in vmx_segment_cache_test_set()
830 vmx->segment_cache.bitmask |= mask; in vmx_segment_cache_test_set()
836 u16 *p = &vmx->segment_cache.seg[seg].selector; in vmx_read_guest_seg_selector()
845 ulong *p = &vmx->segment_cache.seg[seg].base; in vmx_read_guest_seg_base()
854 u32 *p = &vmx->segment_cache.seg[seg].limit; in vmx_read_guest_seg_limit()
863 u32 *p = &vmx->segment_cache.seg[seg].ar; in vmx_read_guest_seg_ar()
884 if ((vcpu->guest_debug & in update_exception_bitmap()
888 if (to_vmx(vcpu)->rmode.vm86_active) in update_exception_bitmap()
899 eb |= get_vmcs12(vcpu)->exception_bitmap; in update_exception_bitmap()
927 msr_bitmap = vmx->loaded_vmcs->msr_bitmap; in msr_write_intercepted()
943 if (vmx->loaded_vmcs->launched) in __vmx_vcpu_run_flags()
949 * it after vmexit and store it in vmx->spec_ctrl. in __vmx_vcpu_run_flags()
968 for (i = 0; i < m->nr; ++i) { in vmx_find_loadstore_msr_slot()
969 if (m->val[i].index == msr) in vmx_find_loadstore_msr_slot()
972 return -ENOENT; in vmx_find_loadstore_msr_slot()
978 struct msr_autoload *m = &vmx->msr_autoload; in clear_atomic_switch_msr()
998 i = vmx_find_loadstore_msr_slot(&m->guest, msr); in clear_atomic_switch_msr()
1001 --m->guest.nr; in clear_atomic_switch_msr()
1002 m->guest.val[i] = m->guest.val[m->guest.nr]; in clear_atomic_switch_msr()
1003 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, m->guest.nr); in clear_atomic_switch_msr()
1006 i = vmx_find_loadstore_msr_slot(&m->host, msr); in clear_atomic_switch_msr()
1010 --m->host.nr; in clear_atomic_switch_msr()
1011 m->host.val[i] = m->host.val[m->host.nr]; in clear_atomic_switch_msr()
1012 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, m->host.nr); in clear_atomic_switch_msr()
1031 struct msr_autoload *m = &vmx->msr_autoload; in add_atomic_switch_msr()
1065 i = vmx_find_loadstore_msr_slot(&m->guest, msr); in add_atomic_switch_msr()
1067 j = vmx_find_loadstore_msr_slot(&m->host, msr); in add_atomic_switch_msr()
1069 if ((i < 0 && m->guest.nr == MAX_NR_LOADSTORE_MSRS) || in add_atomic_switch_msr()
1070 (j < 0 && m->host.nr == MAX_NR_LOADSTORE_MSRS)) { in add_atomic_switch_msr()
1076 i = m->guest.nr++; in add_atomic_switch_msr()
1077 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, m->guest.nr); in add_atomic_switch_msr()
1079 m->guest.val[i].index = msr; in add_atomic_switch_msr()
1080 m->guest.val[i].value = guest_val; in add_atomic_switch_msr()
1086 j = m->host.nr++; in add_atomic_switch_msr()
1087 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, m->host.nr); in add_atomic_switch_msr()
1089 m->host.val[j].index = msr; in add_atomic_switch_msr()
1090 m->host.val[j].value = host_val; in add_atomic_switch_msr()
1095 u64 guest_efer = vmx->vcpu.arch.efer; in update_transition_efer()
1120 (enable_ept && ((vmx->vcpu.arch.efer ^ host_efer) & EFER_NX))) { in update_transition_efer()
1140 vmx->guest_uret_msrs[i].data = guest_efer; in update_transition_efer()
1141 vmx->guest_uret_msrs[i].mask = ~ignore_bits; in update_transition_efer()
1148 * On 32-bit kernels, VM exits still load the FS and GS bases from the
1178 !(vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN); in pt_can_write_msr()
1183 /* The base must be 128-byte aligned and a legal physical address. */ in pt_output_base_valid()
1191 wrmsrl(MSR_IA32_RTIT_STATUS, ctx->status); in pt_load_msr()
1192 wrmsrl(MSR_IA32_RTIT_OUTPUT_BASE, ctx->output_base); in pt_load_msr()
1193 wrmsrl(MSR_IA32_RTIT_OUTPUT_MASK, ctx->output_mask); in pt_load_msr()
1194 wrmsrl(MSR_IA32_RTIT_CR3_MATCH, ctx->cr3_match); in pt_load_msr()
1196 wrmsrl(MSR_IA32_RTIT_ADDR0_A + i * 2, ctx->addr_a[i]); in pt_load_msr()
1197 wrmsrl(MSR_IA32_RTIT_ADDR0_B + i * 2, ctx->addr_b[i]); in pt_load_msr()
1205 rdmsrl(MSR_IA32_RTIT_STATUS, ctx->status); in pt_save_msr()
1206 rdmsrl(MSR_IA32_RTIT_OUTPUT_BASE, ctx->output_base); in pt_save_msr()
1207 rdmsrl(MSR_IA32_RTIT_OUTPUT_MASK, ctx->output_mask); in pt_save_msr()
1208 rdmsrl(MSR_IA32_RTIT_CR3_MATCH, ctx->cr3_match); in pt_save_msr()
1210 rdmsrl(MSR_IA32_RTIT_ADDR0_A + i * 2, ctx->addr_a[i]); in pt_save_msr()
1211 rdmsrl(MSR_IA32_RTIT_ADDR0_B + i * 2, ctx->addr_b[i]); in pt_save_msr()
1224 rdmsrl(MSR_IA32_RTIT_CTL, vmx->pt_desc.host.ctl); in pt_guest_enter()
1225 if (vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) { in pt_guest_enter()
1227 pt_save_msr(&vmx->pt_desc.host, vmx->pt_desc.addr_range); in pt_guest_enter()
1228 pt_load_msr(&vmx->pt_desc.guest, vmx->pt_desc.addr_range); in pt_guest_enter()
1237 if (vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) { in pt_guest_exit()
1238 pt_save_msr(&vmx->pt_desc.guest, vmx->pt_desc.addr_range); in pt_guest_exit()
1239 pt_load_msr(&vmx->pt_desc.host, vmx->pt_desc.addr_range); in pt_guest_exit()
1243 wrmsrl(MSR_IA32_RTIT_CTL, vmx->pt_desc.host.ctl); in pt_guest_exit()
1249 if (unlikely(fs_sel != host->fs_sel)) { in vmx_set_host_fs_gs()
1254 host->fs_sel = fs_sel; in vmx_set_host_fs_gs()
1256 if (unlikely(gs_sel != host->gs_sel)) { in vmx_set_host_fs_gs()
1261 host->gs_sel = gs_sel; in vmx_set_host_fs_gs()
1263 if (unlikely(fs_base != host->fs_base)) { in vmx_set_host_fs_gs()
1265 host->fs_base = fs_base; in vmx_set_host_fs_gs()
1267 if (unlikely(gs_base != host->gs_base)) { in vmx_set_host_fs_gs()
1269 host->gs_base = gs_base; in vmx_set_host_fs_gs()
1284 vmx->req_immediate_exit = false; in vmx_prepare_switch_to_guest()
1289 * to/from long-mode by setting MSR_EFER.LMA. in vmx_prepare_switch_to_guest()
1291 if (!vmx->guest_uret_msrs_loaded) { in vmx_prepare_switch_to_guest()
1292 vmx->guest_uret_msrs_loaded = true; in vmx_prepare_switch_to_guest()
1293 for (i = 0; i < vmx->nr_active_uret_msrs; ++i) in vmx_prepare_switch_to_guest()
1294 kvm_set_user_return_msr(vmx->guest_uret_msrs[i].slot, in vmx_prepare_switch_to_guest()
1295 vmx->guest_uret_msrs[i].data, in vmx_prepare_switch_to_guest()
1296 vmx->guest_uret_msrs[i].mask); in vmx_prepare_switch_to_guest()
1300 if (vmx->nested.need_vmcs12_to_shadow_sync) in vmx_prepare_switch_to_guest()
1303 if (vmx->guest_state_loaded) in vmx_prepare_switch_to_guest()
1306 host_state = &vmx->loaded_vmcs->host_state; in vmx_prepare_switch_to_guest()
1312 host_state->ldt_sel = kvm_read_ldt(); in vmx_prepare_switch_to_guest()
1315 savesegment(ds, host_state->ds_sel); in vmx_prepare_switch_to_guest()
1316 savesegment(es, host_state->es_sel); in vmx_prepare_switch_to_guest()
1319 if (likely(is_64bit_mm(current->mm))) { in vmx_prepare_switch_to_guest()
1321 fs_sel = current->thread.fsindex; in vmx_prepare_switch_to_guest()
1322 gs_sel = current->thread.gsindex; in vmx_prepare_switch_to_guest()
1323 fs_base = current->thread.fsbase; in vmx_prepare_switch_to_guest()
1324 vmx->msr_host_kernel_gs_base = current->thread.gsbase; in vmx_prepare_switch_to_guest()
1329 vmx->msr_host_kernel_gs_base = read_msr(MSR_KERNEL_GS_BASE); in vmx_prepare_switch_to_guest()
1332 wrmsrl(MSR_KERNEL_GS_BASE, vmx->msr_guest_kernel_gs_base); in vmx_prepare_switch_to_guest()
1341 vmx->guest_state_loaded = true; in vmx_prepare_switch_to_guest()
1348 if (!vmx->guest_state_loaded) in vmx_prepare_switch_to_host()
1351 host_state = &vmx->loaded_vmcs->host_state; in vmx_prepare_switch_to_host()
1353 ++vmx->vcpu.stat.host_state_reload; in vmx_prepare_switch_to_host()
1356 rdmsrl(MSR_KERNEL_GS_BASE, vmx->msr_guest_kernel_gs_base); in vmx_prepare_switch_to_host()
1358 if (host_state->ldt_sel || (host_state->gs_sel & 7)) { in vmx_prepare_switch_to_host()
1359 kvm_load_ldt(host_state->ldt_sel); in vmx_prepare_switch_to_host()
1361 load_gs_index(host_state->gs_sel); in vmx_prepare_switch_to_host()
1363 loadsegment(gs, host_state->gs_sel); in vmx_prepare_switch_to_host()
1366 if (host_state->fs_sel & 7) in vmx_prepare_switch_to_host()
1367 loadsegment(fs, host_state->fs_sel); in vmx_prepare_switch_to_host()
1369 if (unlikely(host_state->ds_sel | host_state->es_sel)) { in vmx_prepare_switch_to_host()
1370 loadsegment(ds, host_state->ds_sel); in vmx_prepare_switch_to_host()
1371 loadsegment(es, host_state->es_sel); in vmx_prepare_switch_to_host()
1376 wrmsrl(MSR_KERNEL_GS_BASE, vmx->msr_host_kernel_gs_base); in vmx_prepare_switch_to_host()
1379 vmx->guest_state_loaded = false; in vmx_prepare_switch_to_host()
1380 vmx->guest_uret_msrs_loaded = false; in vmx_prepare_switch_to_host()
1387 if (vmx->guest_state_loaded) in vmx_read_guest_kernel_gs_base()
1388 rdmsrl(MSR_KERNEL_GS_BASE, vmx->msr_guest_kernel_gs_base); in vmx_read_guest_kernel_gs_base()
1390 return vmx->msr_guest_kernel_gs_base; in vmx_read_guest_kernel_gs_base()
1396 if (vmx->guest_state_loaded) in vmx_write_guest_kernel_gs_base()
1399 vmx->msr_guest_kernel_gs_base = data; in vmx_write_guest_kernel_gs_base()
1407 bool already_loaded = vmx->loaded_vmcs->cpu == cpu; in vmx_vcpu_load_vmcs()
1411 loaded_vmcs_clear(vmx->loaded_vmcs); in vmx_vcpu_load_vmcs()
1415 * Ensure loaded_vmcs->cpu is read before adding loaded_vmcs to in vmx_vcpu_load_vmcs()
1422 list_add(&vmx->loaded_vmcs->loaded_vmcss_on_cpu_link, in vmx_vcpu_load_vmcs()
1428 if (prev != vmx->loaded_vmcs->vmcs) { in vmx_vcpu_load_vmcs()
1429 per_cpu(current_vmcs, cpu) = vmx->loaded_vmcs->vmcs; in vmx_vcpu_load_vmcs()
1430 vmcs_load(vmx->loaded_vmcs->vmcs); in vmx_vcpu_load_vmcs()
1434 * the active VMCS within a guest, e.g. on nested VM-Enter. in vmx_vcpu_load_vmcs()
1437 if (!buddy || WARN_ON_ONCE(buddy->vmcs != prev)) in vmx_vcpu_load_vmcs()
1452 * Linux uses per-cpu TSS and GDT, so set these when switching in vmx_vcpu_load_vmcs()
1456 (unsigned long)&get_cpu_entry_area(cpu)->tss.x86_tss); in vmx_vcpu_load_vmcs()
1462 vmx->loaded_vmcs->cpu = cpu; in vmx_vcpu_load_vmcs()
1467 vmx->current_tsc_ratio != vcpu->arch.tsc_scaling_ratio) in vmx_vcpu_load_vmcs()
1483 vmx->host_debugctlmsr = get_debugctlmsr(); in vmx_vcpu_load()
1506 if (vmx->rmode.vm86_active) { in vmx_get_rflags()
1508 save_rflags = vmx->rmode.save_rflags; in vmx_get_rflags()
1511 vmx->rflags = rflags; in vmx_get_rflags()
1513 return vmx->rflags; in vmx_get_rflags()
1523 vmx->rflags = rflags; in vmx_set_rflags()
1529 vmx->rflags = rflags; in vmx_set_rflags()
1530 if (vmx->rmode.vm86_active) { in vmx_set_rflags()
1531 vmx->rmode.save_rflags = rflags; in vmx_set_rflags()
1536 if ((old_rflags ^ vmx->rflags) & X86_EFLAGS_VM) in vmx_set_rflags()
1537 vmx->emulation_required = emulation_required(vcpu); in vmx_set_rflags()
1578 if (data & vmx->pt_desc.ctl_bitmask) in vmx_rtit_ctl_check()
1585 if ((vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) && in vmx_rtit_ctl_check()
1586 ((vmx->pt_desc.guest.ctl ^ data) & ~RTIT_CTL_TRACEEN)) in vmx_rtit_ctl_check()
1592 * CPUID.(EAX=14H, ECX=0):ECX.SNGLRGNOUT[bit 2] = 0 in vmx_rtit_ctl_check()
1596 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_rtit_ctl_check()
1604 value = intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_mtc_periods); in vmx_rtit_ctl_check()
1605 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_mtc) && in vmx_rtit_ctl_check()
1609 value = intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_rtit_ctl_check()
1611 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_psb_cyc) && in vmx_rtit_ctl_check()
1615 value = intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_psb_periods); in vmx_rtit_ctl_check()
1616 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_psb_cyc) && in vmx_rtit_ctl_check()
1626 if ((value && (vmx->pt_desc.addr_range < 1)) || (value > 2)) in vmx_rtit_ctl_check()
1629 if ((value && (vmx->pt_desc.addr_range < 2)) || (value > 2)) in vmx_rtit_ctl_check()
1632 if ((value && (vmx->pt_desc.addr_range < 3)) || (value > 2)) in vmx_rtit_ctl_check()
1635 if ((value && (vmx->pt_desc.addr_range < 4)) || (value > 2)) in vmx_rtit_ctl_check()
1655 * (namely Hyper-V) don't set it due to it being undefined behavior, in skip_emulated_instruction()
1659 to_vmx(vcpu)->exit_reason.basic != EXIT_REASON_EPT_MISCONFIG) { in skip_emulated_instruction()
1664 * We need to mask out the high 32 bits of RIP if not in 64-bit in skip_emulated_instruction()
1665 * mode, but just finding out that we are in 64-bit mode is in skip_emulated_instruction()
1684 * Recognizes a pending MTF VM-exit and records the nested state for later
1696 * Per the SDM, MTF takes priority over debug-trap exceptions besides in vmx_update_emulated_instruction()
1697 * T-bit traps. As instruction emulation is completed (i.e. at the in vmx_update_emulated_instruction()
1699 * debug-trap. Record the pending MTF state to be delivered in in vmx_update_emulated_instruction()
1703 (!vcpu->arch.exception.pending || in vmx_update_emulated_instruction()
1704 vcpu->arch.exception.nr == DB_VECTOR)) in vmx_update_emulated_instruction()
1705 vmx->nested.mtf_pending = true; in vmx_update_emulated_instruction()
1707 vmx->nested.mtf_pending = false; in vmx_update_emulated_instruction()
1724 if (kvm_hlt_in_guest(vcpu->kvm) && in vmx_clear_hlt()
1732 unsigned nr = vcpu->arch.exception.nr; in vmx_queue_exception()
1733 bool has_error_code = vcpu->arch.exception.has_error_code; in vmx_queue_exception()
1734 u32 error_code = vcpu->arch.exception.error_code; in vmx_queue_exception()
1746 * ABI lets userspace shove in arbitrary 32-bit values. Drop in vmx_queue_exception()
1747 * the upper bits to avoid VM-Fail, losing information that in vmx_queue_exception()
1754 if (vmx->rmode.vm86_active) { in vmx_queue_exception()
1757 inc_eip = vcpu->arch.event_exit_inst_len; in vmx_queue_exception()
1762 WARN_ON_ONCE(vmx->emulation_required); in vmx_queue_exception()
1766 vmx->vcpu.arch.event_exit_inst_len); in vmx_queue_exception()
1784 to = vmx->nr_active_uret_msrs++; in vmx_setup_uret_msr()
1786 tmp = vmx->guest_uret_msrs[to]; in vmx_setup_uret_msr()
1787 vmx->guest_uret_msrs[to] = vmx->guest_uret_msrs[from]; in vmx_setup_uret_msr()
1788 vmx->guest_uret_msrs[from] = tmp; in vmx_setup_uret_msr()
1793 * msrs. Don't touch the 64-bit msrs if the guest is in legacy
1798 vmx->guest_uret_msrs_loaded = false; in setup_msrs()
1799 vmx->nr_active_uret_msrs = 0; in setup_msrs()
1805 if (is_long_mode(&vmx->vcpu) && (vmx->vcpu.arch.efer & EFER_SCE)) { in setup_msrs()
1814 if (guest_cpuid_has(&vmx->vcpu, X86_FEATURE_RDTSCP)) in setup_msrs()
1820 vmx_update_msr_bitmap(&vmx->vcpu); in setup_msrs()
1835 (vmcs12->cpu_based_vm_exec_control & CPU_BASED_USE_TSC_OFFSETTING)) in vmx_write_l1_tsc_offset()
1836 g_tsc_offset = vmcs12->tsc_offset; in vmx_write_l1_tsc_offset()
1838 trace_kvm_write_tsc_offset(vcpu->vcpu_id, in vmx_write_l1_tsc_offset()
1839 vcpu->arch.tsc_offset - g_tsc_offset, in vmx_write_l1_tsc_offset()
1859 uint64_t valid_bits = to_vmx(vcpu)->msr_ia32_feature_control_valid_bits; in vmx_feature_control_msr_valid()
1866 switch (msr->index) { in vmx_get_msr_feature()
1870 return vmx_get_vmx_msr(&vmcs_config.nested, msr->index, &msr->data); in vmx_get_msr_feature()
1872 msr->data = vmx_get_perf_capabilities(); in vmx_get_msr_feature()
1881 * Returns 0 on success, non-0 otherwise.
1890 switch (msr_info->index) { in vmx_get_msr()
1893 msr_info->data = vmcs_readl(GUEST_FS_BASE); in vmx_get_msr()
1896 msr_info->data = vmcs_readl(GUEST_GS_BASE); in vmx_get_msr()
1899 msr_info->data = vmx_read_guest_kernel_gs_base(vmx); in vmx_get_msr()
1905 if (!msr_info->host_initiated && in vmx_get_msr()
1906 !(vcpu->arch.arch_capabilities & ARCH_CAP_TSX_CTRL_MSR)) in vmx_get_msr()
1910 if (!msr_info->host_initiated && !vmx_has_waitpkg(vmx)) in vmx_get_msr()
1913 msr_info->data = vmx->msr_ia32_umwait_control; in vmx_get_msr()
1916 if (!msr_info->host_initiated && in vmx_get_msr()
1920 msr_info->data = to_vmx(vcpu)->spec_ctrl; in vmx_get_msr()
1923 msr_info->data = vmcs_read32(GUEST_SYSENTER_CS); in vmx_get_msr()
1926 msr_info->data = vmcs_readl(GUEST_SYSENTER_EIP); in vmx_get_msr()
1929 msr_info->data = vmcs_readl(GUEST_SYSENTER_ESP); in vmx_get_msr()
1933 (!msr_info->host_initiated && in vmx_get_msr()
1936 msr_info->data = vmcs_read64(GUEST_BNDCFGS); in vmx_get_msr()
1939 if (!msr_info->host_initiated && in vmx_get_msr()
1940 !(vmx->msr_ia32_feature_control & in vmx_get_msr()
1943 msr_info->data = vcpu->arch.mcg_ext_ctl; in vmx_get_msr()
1946 msr_info->data = vmx->msr_ia32_feature_control; in vmx_get_msr()
1951 if (vmx_get_vmx_msr(&vmx->nested.msrs, msr_info->index, in vmx_get_msr()
1952 &msr_info->data)) in vmx_get_msr()
1956 * instead of just ignoring the features, different Hyper-V in vmx_get_msr()
1961 if (!msr_info->host_initiated && in vmx_get_msr()
1962 vmx->nested.enlightened_vmcs_enabled) in vmx_get_msr()
1963 nested_evmcs_filter_control_msr(msr_info->index, in vmx_get_msr()
1964 &msr_info->data); in vmx_get_msr()
1969 msr_info->data = vmx->pt_desc.guest.ctl; in vmx_get_msr()
1974 msr_info->data = vmx->pt_desc.guest.status; in vmx_get_msr()
1978 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_get_msr()
1981 msr_info->data = vmx->pt_desc.guest.cr3_match; in vmx_get_msr()
1985 (!intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_get_msr()
1987 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_get_msr()
1990 msr_info->data = vmx->pt_desc.guest.output_base; in vmx_get_msr()
1994 (!intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_get_msr()
1996 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_get_msr()
1999 msr_info->data = vmx->pt_desc.guest.output_mask; in vmx_get_msr()
2002 index = msr_info->index - MSR_IA32_RTIT_ADDR0_A; in vmx_get_msr()
2004 (index >= 2 * intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_get_msr()
2008 msr_info->data = vmx->pt_desc.guest.addr_b[index / 2]; in vmx_get_msr()
2010 msr_info->data = vmx->pt_desc.guest.addr_a[index / 2]; in vmx_get_msr()
2013 if (!msr_info->host_initiated && in vmx_get_msr()
2019 msr = vmx_find_uret_msr(vmx, msr_info->index); in vmx_get_msr()
2021 msr_info->data = msr->data; in vmx_get_msr()
2042 * Returns 0 on success, non-0 otherwise.
2050 u32 msr_index = msr_info->index; in vmx_set_msr()
2051 u64 data = msr_info->data; in vmx_set_msr()
2073 get_vmcs12(vcpu)->guest_sysenter_cs = data; in vmx_set_msr()
2079 get_vmcs12(vcpu)->guest_sysenter_eip = data; in vmx_set_msr()
2086 get_vmcs12(vcpu)->guest_sysenter_esp = data; in vmx_set_msr()
2091 if (is_guest_mode(vcpu) && get_vmcs12(vcpu)->vm_exit_controls & in vmx_set_msr()
2093 get_vmcs12(vcpu)->guest_ia32_debugctl = data; in vmx_set_msr()
2100 (!msr_info->host_initiated && in vmx_set_msr()
2109 if (!msr_info->host_initiated && !vmx_has_waitpkg(vmx)) in vmx_set_msr()
2112 /* The reserved bit 1 and non-32 bit [63:32] should be zero */ in vmx_set_msr()
2116 vmx->msr_ia32_umwait_control = data; in vmx_set_msr()
2119 if (!msr_info->host_initiated && in vmx_set_msr()
2126 vmx->spec_ctrl = data; in vmx_set_msr()
2131 * For non-nested: in vmx_set_msr()
2132 * When it's written (to non-zero) for the first time, pass in vmx_set_msr()
2147 if (!msr_info->host_initiated && in vmx_set_msr()
2148 !(vcpu->arch.arch_capabilities & ARCH_CAP_TSX_CTRL_MSR)) in vmx_set_msr()
2154 if (!msr_info->host_initiated && in vmx_set_msr()
2168 * For non-nested: in vmx_set_msr()
2169 * When it's written (to non-zero) for the first time, pass in vmx_set_msr()
2185 get_vmcs12(vcpu)->vm_exit_controls & VM_EXIT_SAVE_IA32_PAT) in vmx_set_msr()
2186 get_vmcs12(vcpu)->guest_ia32_pat = data; in vmx_set_msr()
2190 vcpu->arch.pat = data; in vmx_set_msr()
2199 if ((!msr_info->host_initiated && in vmx_set_msr()
2200 !(to_vmx(vcpu)->msr_ia32_feature_control & in vmx_set_msr()
2204 vcpu->arch.mcg_ext_ctl = data; in vmx_set_msr()
2208 (to_vmx(vcpu)->msr_ia32_feature_control & in vmx_set_msr()
2209 FEAT_CTL_LOCKED && !msr_info->host_initiated)) in vmx_set_msr()
2211 vmx->msr_ia32_feature_control = data; in vmx_set_msr()
2212 if (msr_info->host_initiated && data == 0) in vmx_set_msr()
2216 if (!msr_info->host_initiated) in vmx_set_msr()
2217 return 1; /* they are read-only */ in vmx_set_msr()
2224 vmx->nested.vmxon) in vmx_set_msr()
2227 vmx->pt_desc.guest.ctl = data; in vmx_set_msr()
2235 vmx->pt_desc.guest.status = data; in vmx_set_msr()
2240 if (!intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_set_msr()
2243 vmx->pt_desc.guest.cr3_match = data; in vmx_set_msr()
2248 if (!intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_set_msr()
2250 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_set_msr()
2255 vmx->pt_desc.guest.output_base = data; in vmx_set_msr()
2260 if (!intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_set_msr()
2262 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_set_msr()
2265 vmx->pt_desc.guest.output_mask = data; in vmx_set_msr()
2270 index = msr_info->index - MSR_IA32_RTIT_ADDR0_A; in vmx_set_msr()
2271 if (index >= 2 * intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_set_msr()
2277 vmx->pt_desc.guest.addr_b[index / 2] = data; in vmx_set_msr()
2279 vmx->pt_desc.guest.addr_a[index / 2] = data; in vmx_set_msr()
2282 if (!msr_info->host_initiated && in vmx_set_msr()
2314 vcpu->arch.regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP); in vmx_cache_reg()
2317 vcpu->arch.regs[VCPU_REGS_RIP] = vmcs_readl(GUEST_RIP); in vmx_cache_reg()
2324 guest_owned_bits = vcpu->arch.cr0_guest_owned_bits; in vmx_cache_reg()
2326 vcpu->arch.cr0 &= ~guest_owned_bits; in vmx_cache_reg()
2327 vcpu->arch.cr0 |= vmcs_readl(GUEST_CR0) & guest_owned_bits; in vmx_cache_reg()
2332 vcpu->arch.cr3 = vmcs_readl(GUEST_CR3); in vmx_cache_reg()
2335 guest_owned_bits = vcpu->arch.cr4_guest_owned_bits; in vmx_cache_reg()
2337 vcpu->arch.cr4 &= ~guest_owned_bits; in vmx_cache_reg()
2338 vcpu->arch.cr4 |= vmcs_readl(GUEST_CR4) & guest_owned_bits; in vmx_cache_reg()
2376 return -EFAULT; in kvm_cpu_vmxon()
2386 return -EBUSY; in hardware_enable()
2389 * This can happen if we hot-added a CPU but failed to allocate in hardware_enable()
2394 return -EFAULT; in hardware_enable()
2458 return -EIO; in adjust_vmx_controls()
2496 return -EIO; in setup_vmcs_config()
2531 return -EIO; in setup_vmcs_config()
2546 &vmx_cap->ept, &vmx_cap->vpid); in setup_vmcs_config()
2554 } else if (vmx_cap->ept) { in setup_vmcs_config()
2555 vmx_cap->ept = 0; in setup_vmcs_config()
2557 "1-setting enable EPT VM-execution control\n"); in setup_vmcs_config()
2560 vmx_cap->vpid) { in setup_vmcs_config()
2561 vmx_cap->vpid = 0; in setup_vmcs_config()
2563 "1-setting enable VPID VM-execution control\n"); in setup_vmcs_config()
2578 return -EIO; in setup_vmcs_config()
2585 return -EIO; in setup_vmcs_config()
2602 return -EIO; in setup_vmcs_config()
2630 /* IA-32 SDM Vol 3B: VMCS size is never greater than 4kB. */ in setup_vmcs_config()
2632 return -EIO; in setup_vmcs_config()
2635 /* IA-32 SDM Vol 3B: 64-bit CPUs always have VMX_BASIC_MSR[48]==0. */ in setup_vmcs_config()
2637 return -EIO; in setup_vmcs_config()
2640 /* Require Write-Back (WB) memory type for VMCS accesses. */ in setup_vmcs_config()
2642 return -EIO; in setup_vmcs_config()
2644 vmcs_conf->size = vmx_msr_high & 0x1fff; in setup_vmcs_config()
2645 vmcs_conf->order = get_order(vmcs_conf->size); in setup_vmcs_config()
2646 vmcs_conf->basic_cap = vmx_msr_high & ~0x1fff; in setup_vmcs_config()
2648 vmcs_conf->revision_id = vmx_msr_low; in setup_vmcs_config()
2650 vmcs_conf->pin_based_exec_ctrl = _pin_based_exec_control; in setup_vmcs_config()
2651 vmcs_conf->cpu_based_exec_ctrl = _cpu_based_exec_control; in setup_vmcs_config()
2652 vmcs_conf->cpu_based_2nd_exec_ctrl = _cpu_based_2nd_exec_control; in setup_vmcs_config()
2653 vmcs_conf->vmexit_ctrl = _vmexit_control; in setup_vmcs_config()
2654 vmcs_conf->vmentry_ctrl = _vmentry_control; in setup_vmcs_config()
2678 vmcs->hdr.revision_id = KVM_EVMCS_VERSION; in alloc_vmcs_cpu()
2680 vmcs->hdr.revision_id = vmcs_config.revision_id; in alloc_vmcs_cpu()
2683 vmcs->hdr.shadow_vmcs = 1; in alloc_vmcs_cpu()
2697 if (!loaded_vmcs->vmcs) in free_loaded_vmcs()
2700 free_vmcs(loaded_vmcs->vmcs); in free_loaded_vmcs()
2701 loaded_vmcs->vmcs = NULL; in free_loaded_vmcs()
2702 if (loaded_vmcs->msr_bitmap) in free_loaded_vmcs()
2703 free_page((unsigned long)loaded_vmcs->msr_bitmap); in free_loaded_vmcs()
2704 WARN_ON(loaded_vmcs->shadow_vmcs != NULL); in free_loaded_vmcs()
2709 loaded_vmcs->vmcs = alloc_vmcs(false); in alloc_loaded_vmcs()
2710 if (!loaded_vmcs->vmcs) in alloc_loaded_vmcs()
2711 return -ENOMEM; in alloc_loaded_vmcs()
2713 vmcs_clear(loaded_vmcs->vmcs); in alloc_loaded_vmcs()
2715 loaded_vmcs->shadow_vmcs = NULL; in alloc_loaded_vmcs()
2716 loaded_vmcs->hv_timer_soft_disabled = false; in alloc_loaded_vmcs()
2717 loaded_vmcs->cpu = -1; in alloc_loaded_vmcs()
2718 loaded_vmcs->launched = 0; in alloc_loaded_vmcs()
2721 loaded_vmcs->msr_bitmap = (unsigned long *) in alloc_loaded_vmcs()
2723 if (!loaded_vmcs->msr_bitmap) in alloc_loaded_vmcs()
2725 memset(loaded_vmcs->msr_bitmap, 0xff, PAGE_SIZE); in alloc_loaded_vmcs()
2731 (struct hv_enlightened_vmcs *)loaded_vmcs->vmcs; in alloc_loaded_vmcs()
2733 evmcs->hv_enlightenments_control.msr_bitmap = 1; in alloc_loaded_vmcs()
2737 memset(&loaded_vmcs->host_state, 0, sizeof(struct vmcs_host_state)); in alloc_loaded_vmcs()
2738 memset(&loaded_vmcs->controls_shadow, 0, in alloc_loaded_vmcs()
2745 return -ENOMEM; in alloc_loaded_vmcs()
2768 return -ENOMEM; in alloc_kvm_area()
2773 * vmcs->revision_id to KVM_EVMCS_VERSION instead of in alloc_kvm_area()
2782 vmcs->hdr.revision_id = vmcs_config.revision_id; in alloc_kvm_area()
2801 save->selector &= ~SEGMENT_RPL_MASK; in fix_pmode_seg()
2802 save->dpl = save->selector & SEGMENT_RPL_MASK; in fix_pmode_seg()
2803 save->s = 1; in fix_pmode_seg()
2814 * Update real mode segment cache. It may be not up-to-date if sement in enter_pmode()
2817 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_ES], VCPU_SREG_ES); in enter_pmode()
2818 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_DS], VCPU_SREG_DS); in enter_pmode()
2819 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_FS], VCPU_SREG_FS); in enter_pmode()
2820 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_GS], VCPU_SREG_GS); in enter_pmode()
2821 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_SS], VCPU_SREG_SS); in enter_pmode()
2822 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_CS], VCPU_SREG_CS); in enter_pmode()
2824 vmx->rmode.vm86_active = 0; in enter_pmode()
2826 vmx_set_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_TR], VCPU_SREG_TR); in enter_pmode()
2830 flags |= vmx->rmode.save_rflags & ~RMODE_GUEST_OWNED_EFLAGS_BITS; in enter_pmode()
2838 fix_pmode_seg(vcpu, VCPU_SREG_CS, &vmx->rmode.segs[VCPU_SREG_CS]); in enter_pmode()
2839 fix_pmode_seg(vcpu, VCPU_SREG_SS, &vmx->rmode.segs[VCPU_SREG_SS]); in enter_pmode()
2840 fix_pmode_seg(vcpu, VCPU_SREG_ES, &vmx->rmode.segs[VCPU_SREG_ES]); in enter_pmode()
2841 fix_pmode_seg(vcpu, VCPU_SREG_DS, &vmx->rmode.segs[VCPU_SREG_DS]); in enter_pmode()
2842 fix_pmode_seg(vcpu, VCPU_SREG_FS, &vmx->rmode.segs[VCPU_SREG_FS]); in enter_pmode()
2843 fix_pmode_seg(vcpu, VCPU_SREG_GS, &vmx->rmode.segs[VCPU_SREG_GS]); in enter_pmode()
2867 if (save->base & 0xf) in fix_rmode_seg()
2873 vmcs_write16(sf->selector, var.selector); in fix_rmode_seg()
2874 vmcs_writel(sf->base, var.base); in fix_rmode_seg()
2875 vmcs_write32(sf->limit, var.limit); in fix_rmode_seg()
2876 vmcs_write32(sf->ar_bytes, vmx_segment_access_rights(&var)); in fix_rmode_seg()
2883 struct kvm_vmx *kvm_vmx = to_kvm_vmx(vcpu->kvm); in enter_rmode()
2885 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_TR], VCPU_SREG_TR); in enter_rmode()
2886 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_ES], VCPU_SREG_ES); in enter_rmode()
2887 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_DS], VCPU_SREG_DS); in enter_rmode()
2888 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_FS], VCPU_SREG_FS); in enter_rmode()
2889 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_GS], VCPU_SREG_GS); in enter_rmode()
2890 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_SS], VCPU_SREG_SS); in enter_rmode()
2891 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_CS], VCPU_SREG_CS); in enter_rmode()
2893 vmx->rmode.vm86_active = 1; in enter_rmode()
2899 if (!kvm_vmx->tss_addr) in enter_rmode()
2905 vmcs_writel(GUEST_TR_BASE, kvm_vmx->tss_addr); in enter_rmode()
2906 vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1); in enter_rmode()
2910 vmx->rmode.save_rflags = flags; in enter_rmode()
2918 fix_rmode_seg(VCPU_SREG_SS, &vmx->rmode.segs[VCPU_SREG_SS]); in enter_rmode()
2919 fix_rmode_seg(VCPU_SREG_CS, &vmx->rmode.segs[VCPU_SREG_CS]); in enter_rmode()
2920 fix_rmode_seg(VCPU_SREG_ES, &vmx->rmode.segs[VCPU_SREG_ES]); in enter_rmode()
2921 fix_rmode_seg(VCPU_SREG_DS, &vmx->rmode.segs[VCPU_SREG_DS]); in enter_rmode()
2922 fix_rmode_seg(VCPU_SREG_GS, &vmx->rmode.segs[VCPU_SREG_GS]); in enter_rmode()
2923 fix_rmode_seg(VCPU_SREG_FS, &vmx->rmode.segs[VCPU_SREG_FS]); in enter_rmode()
2937 vcpu->arch.efer = efer; in vmx_set_efer()
2940 msr->data = efer; in vmx_set_efer()
2944 msr->data = efer & ~EFER_LME; in vmx_set_efer()
2966 vmx_set_efer(vcpu, vcpu->arch.efer | EFER_LMA); in enter_lmode()
2972 vmx_set_efer(vcpu, vcpu->arch.efer & ~EFER_LMA); in exit_lmode()
2983 * the CPU is not required to invalidate guest-physical mappings on in vmx_flush_tlb_all()
2984 * VM-Entry, even if VPID is disabled. Guest-physical mappings are in vmx_flush_tlb_all()
2986 * (INVVPID also isn't required to invalidate guest-physical mappings). in vmx_flush_tlb_all()
2994 vpid_sync_vcpu_single(vmx->vpid); in vmx_flush_tlb_all()
2995 vpid_sync_vcpu_single(vmx->nested.vpid02); in vmx_flush_tlb_all()
3004 return to_vmx(vcpu)->vpid; in vmx_get_current_vpid()
3009 struct kvm_mmu *mmu = vcpu->arch.mmu; in vmx_flush_tlb_current()
3010 u64 root_hpa = mmu->root_hpa; in vmx_flush_tlb_current()
3018 mmu->shadow_root_level)); in vmx_flush_tlb_current()
3036 * vpid couldn't be allocated for this vCPU. VM-Enter and VM-Exit are in vmx_flush_tlb_guest()
3037 * required to flush GVA->{G,H}PA mappings from the TLB if vpid is in vmx_flush_tlb_guest()
3038 * disabled (VM-Enter with vpid enabled and vpid==0 is disallowed), in vmx_flush_tlb_guest()
3046 struct kvm_mmu *mmu = vcpu->arch.walk_mmu; in vmx_ept_load_pdptrs()
3052 vmcs_write64(GUEST_PDPTR0, mmu->pdptrs[0]); in vmx_ept_load_pdptrs()
3053 vmcs_write64(GUEST_PDPTR1, mmu->pdptrs[1]); in vmx_ept_load_pdptrs()
3054 vmcs_write64(GUEST_PDPTR2, mmu->pdptrs[2]); in vmx_ept_load_pdptrs()
3055 vmcs_write64(GUEST_PDPTR3, mmu->pdptrs[3]); in vmx_ept_load_pdptrs()
3061 struct kvm_mmu *mmu = vcpu->arch.walk_mmu; in ept_save_pdptrs()
3066 mmu->pdptrs[0] = vmcs_read64(GUEST_PDPTR0); in ept_save_pdptrs()
3067 mmu->pdptrs[1] = vmcs_read64(GUEST_PDPTR1); in ept_save_pdptrs()
3068 mmu->pdptrs[2] = vmcs_read64(GUEST_PDPTR2); in ept_save_pdptrs()
3069 mmu->pdptrs[3] = vmcs_read64(GUEST_PDPTR3); in ept_save_pdptrs()
3086 vcpu->arch.cr0 = cr0; in ept_update_paging_mode_cr0()
3092 vcpu->arch.cr0 = cr0; in ept_update_paging_mode_cr0()
3111 if (vmx->rmode.vm86_active && (cr0 & X86_CR0_PE)) in vmx_set_cr0()
3114 if (!vmx->rmode.vm86_active && !(cr0 & X86_CR0_PE)) in vmx_set_cr0()
3119 if (vcpu->arch.efer & EFER_LME) { in vmx_set_cr0()
3132 vcpu->arch.cr0 = cr0; in vmx_set_cr0()
3135 /* depends on vcpu->arch.cr0 to be set to a new value */ in vmx_set_cr0()
3136 vmx->emulation_required = emulation_required(vcpu); in vmx_set_cr0()
3164 struct kvm *kvm = vcpu->kvm; in vmx_load_mmu_pgd()
3174 spin_lock(&to_kvm_vmx(kvm)->ept_pointer_lock); in vmx_load_mmu_pgd()
3175 to_vmx(vcpu)->ept_pointer = eptp; in vmx_load_mmu_pgd()
3176 to_kvm_vmx(kvm)->ept_pointers_match in vmx_load_mmu_pgd()
3178 spin_unlock(&to_kvm_vmx(kvm)->ept_pointer_lock); in vmx_load_mmu_pgd()
3182 guest_cr3 = to_kvm_vmx(kvm)->ept_identity_map_addr; in vmx_load_mmu_pgd()
3183 else if (test_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail)) in vmx_load_mmu_pgd()
3184 guest_cr3 = vcpu->arch.cr3; in vmx_load_mmu_pgd()
3185 else /* vmcs01.GUEST_CR3 is already up-to-date. */ in vmx_load_mmu_pgd()
3206 if (to_vmx(vcpu)->nested.vmxon && !nested_cr4_valid(vcpu, cr4)) in vmx_is_valid_cr4()
3225 else if (vmx->rmode.vm86_active) in vmx_set_cr4()
3240 vcpu->arch.cr4 = cr4; in vmx_set_cr4()
3254 * SMEP/SMAP/PKU is disabled if CPU is in non-paging mode in in vmx_set_cr4()
3256 * to be manually disabled when guest switches to non-paging in vmx_set_cr4()
3277 if (vmx->rmode.vm86_active && seg != VCPU_SREG_LDTR) { in vmx_get_segment()
3278 *var = vmx->rmode.segs[seg]; in vmx_get_segment()
3280 || var->selector == vmx_read_guest_seg_selector(vmx, seg)) in vmx_get_segment()
3282 var->base = vmx_read_guest_seg_base(vmx, seg); in vmx_get_segment()
3283 var->selector = vmx_read_guest_seg_selector(vmx, seg); in vmx_get_segment()
3286 var->base = vmx_read_guest_seg_base(vmx, seg); in vmx_get_segment()
3287 var->limit = vmx_read_guest_seg_limit(vmx, seg); in vmx_get_segment()
3288 var->selector = vmx_read_guest_seg_selector(vmx, seg); in vmx_get_segment()
3290 var->unusable = (ar >> 16) & 1; in vmx_get_segment()
3291 var->type = ar & 15; in vmx_get_segment()
3292 var->s = (ar >> 4) & 1; in vmx_get_segment()
3293 var->dpl = (ar >> 5) & 3; in vmx_get_segment()
3301 var->present = !var->unusable; in vmx_get_segment()
3302 var->avl = (ar >> 12) & 1; in vmx_get_segment()
3303 var->l = (ar >> 13) & 1; in vmx_get_segment()
3304 var->db = (ar >> 14) & 1; in vmx_get_segment()
3305 var->g = (ar >> 15) & 1; in vmx_get_segment()
3312 if (to_vmx(vcpu)->rmode.vm86_active) { in vmx_get_segment_base()
3323 if (unlikely(vmx->rmode.vm86_active)) in vmx_get_cpl()
3335 if (var->unusable || !var->present) in vmx_segment_access_rights()
3338 ar = var->type & 15; in vmx_segment_access_rights()
3339 ar |= (var->s & 1) << 4; in vmx_segment_access_rights()
3340 ar |= (var->dpl & 3) << 5; in vmx_segment_access_rights()
3341 ar |= (var->present & 1) << 7; in vmx_segment_access_rights()
3342 ar |= (var->avl & 1) << 12; in vmx_segment_access_rights()
3343 ar |= (var->l & 1) << 13; in vmx_segment_access_rights()
3344 ar |= (var->db & 1) << 14; in vmx_segment_access_rights()
3345 ar |= (var->g & 1) << 15; in vmx_segment_access_rights()
3358 if (vmx->rmode.vm86_active && seg != VCPU_SREG_LDTR) { in vmx_set_segment()
3359 vmx->rmode.segs[seg] = *var; in vmx_set_segment()
3361 vmcs_write16(sf->selector, var->selector); in vmx_set_segment()
3362 else if (var->s) in vmx_set_segment()
3363 fix_rmode_seg(seg, &vmx->rmode.segs[seg]); in vmx_set_segment()
3367 vmcs_writel(sf->base, var->base); in vmx_set_segment()
3368 vmcs_write32(sf->limit, var->limit); in vmx_set_segment()
3369 vmcs_write16(sf->selector, var->selector); in vmx_set_segment()
3383 var->type |= 0x1; /* Accessed */ in vmx_set_segment()
3385 vmcs_write32(sf->ar_bytes, vmx_segment_access_rights(var)); in vmx_set_segment()
3388 vmx->emulation_required = emulation_required(vcpu); in vmx_set_segment()
3401 dt->size = vmcs_read32(GUEST_IDTR_LIMIT); in vmx_get_idt()
3402 dt->address = vmcs_readl(GUEST_IDTR_BASE); in vmx_get_idt()
3407 vmcs_write32(GUEST_IDTR_LIMIT, dt->size); in vmx_set_idt()
3408 vmcs_writel(GUEST_IDTR_BASE, dt->address); in vmx_set_idt()
3413 dt->size = vmcs_read32(GUEST_GDTR_LIMIT); in vmx_get_gdt()
3414 dt->address = vmcs_readl(GUEST_GDTR_BASE); in vmx_get_gdt()
3419 vmcs_write32(GUEST_GDTR_LIMIT, dt->size); in vmx_set_gdt()
3420 vmcs_writel(GUEST_GDTR_BASE, dt->address); in vmx_set_gdt()
3609 * - Add checks on RIP in __vmx_guest_state_valid()
3610 * - Add checks on RFLAGS in __vmx_guest_state_valid()
3622 idx = srcu_read_lock(&kvm->srcu); in init_rmode_tss()
3623 fn = to_kvm_vmx(kvm)->tss_addr >> PAGE_SHIFT; in init_rmode_tss()
3640 RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1, in init_rmode_tss()
3643 srcu_read_unlock(&kvm->srcu, idx); in init_rmode_tss()
3654 /* Protect kvm_vmx->ept_identity_pagetable_done. */ in init_rmode_identity_map()
3655 mutex_lock(&kvm->slots_lock); in init_rmode_identity_map()
3657 if (likely(kvm_vmx->ept_identity_pagetable_done)) in init_rmode_identity_map()
3660 if (!kvm_vmx->ept_identity_map_addr) in init_rmode_identity_map()
3661 kvm_vmx->ept_identity_map_addr = VMX_EPT_IDENTITY_PAGETABLE_ADDR; in init_rmode_identity_map()
3662 identity_map_pfn = kvm_vmx->ept_identity_map_addr >> PAGE_SHIFT; in init_rmode_identity_map()
3665 kvm_vmx->ept_identity_map_addr, PAGE_SIZE); in init_rmode_identity_map()
3672 /* Set up identity-mapping pagetable for EPT in real mode */ in init_rmode_identity_map()
3681 kvm_vmx->ept_identity_pagetable_done = true; in init_rmode_identity_map()
3684 mutex_unlock(&kvm->slots_lock); in init_rmode_identity_map()
3693 vmcs_write16(sf->selector, 0); in seg_setup()
3694 vmcs_writel(sf->base, 0); in seg_setup()
3695 vmcs_write32(sf->limit, 0xffff); in seg_setup()
3700 vmcs_write32(sf->ar_bytes, ar); in seg_setup()
3708 mutex_lock(&kvm->slots_lock); in alloc_apic_access_page()
3709 if (kvm->arch.apic_access_page_done) in alloc_apic_access_page()
3718 r = -EFAULT; in alloc_apic_access_page()
3723 * Do not pin the page in memory, so that memory hot-unplug in alloc_apic_access_page()
3727 kvm->arch.apic_access_page_done = true; in alloc_apic_access_page()
3729 mutex_unlock(&kvm->slots_lock); in alloc_apic_access_page()
3802 unsigned long *msr_bitmap = vmx->vmcs01.msr_bitmap; in vmx_disable_intercept_for_msr()
3817 if (idx != -ENOENT) { in vmx_disable_intercept_for_msr()
3819 clear_bit(idx, vmx->shadow_msr_intercept.read); in vmx_disable_intercept_for_msr()
3821 clear_bit(idx, vmx->shadow_msr_intercept.write); in vmx_disable_intercept_for_msr()
3848 unsigned long *msr_bitmap = vmx->vmcs01.msr_bitmap; in vmx_enable_intercept_for_msr()
3863 if (idx != -ENOENT) { in vmx_enable_intercept_for_msr()
3865 set_bit(idx, vmx->shadow_msr_intercept.read); in vmx_enable_intercept_for_msr()
3867 set_bit(idx, vmx->shadow_msr_intercept.write); in vmx_enable_intercept_for_msr()
3904 unsigned long *msr_bitmap = to_vmx(vcpu)->vmcs01.msr_bitmap; in vmx_reset_x2apic_msrs()
3944 u8 changed = mode ^ vmx->msr_bitmap_mode; in vmx_update_msr_bitmap()
3952 vmx->msr_bitmap_mode = mode; in vmx_update_msr_bitmap()
3958 bool flag = !(vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN); in pt_update_intercept_for_msr()
3965 for (i = 0; i < vmx->pt_desc.addr_range; i++) { in pt_update_intercept_for_msr()
3980 WARN_ON_ONCE(!vmx->nested.virtual_apic_map.gfn)) in vmx_guest_apic_has_interrupt()
3985 vapic_page = vmx->nested.virtual_apic_map.hva; in vmx_guest_apic_has_interrupt()
4003 bool read = test_bit(i, vmx->shadow_msr_intercept.read); in vmx_msr_filter_changed()
4004 bool write = test_bit(i, vmx->shadow_msr_intercept.write); in vmx_msr_filter_changed()
4020 if (vcpu->mode == IN_GUEST_MODE) { in kvm_vcpu_trigger_posted_interrupt()
4029 * Case 1: vcpu keeps in non-root mode. Sending a in kvm_vcpu_trigger_posted_interrupt()
4046 apic->send_IPI_mask(get_cpu_mask(vcpu->cpu), pi_vec); in kvm_vcpu_trigger_posted_interrupt()
4059 vector == vmx->nested.posted_intr_nv) { in vmx_deliver_nested_posted_interrupt()
4064 vmx->nested.pi_pending = true; in vmx_deliver_nested_posted_interrupt()
4071 return -1; in vmx_deliver_nested_posted_interrupt()
4075 * 1. If target vcpu is running(non-root mode), send posted interrupt
4089 if (!vcpu->arch.apicv_active) in vmx_deliver_posted_interrupt()
4090 return -1; in vmx_deliver_posted_interrupt()
4092 if (pi_test_and_set_pir(vector, &vmx->pi_desc)) in vmx_deliver_posted_interrupt()
4096 if (pi_test_and_set_on(&vmx->pi_desc)) in vmx_deliver_posted_interrupt()
4106 * Set up the vmcs's constant host-state fields, i.e., host-state fields that
4108 * Note that host-state that does change is set elsewhere. E.g., host-state
4127 vmx->loaded_vmcs->host_state.cr3 = cr3; in vmx_set_constant_host_state()
4132 vmx->loaded_vmcs->host_state.cr4 = cr4; in vmx_set_constant_host_state()
4170 struct kvm_vcpu *vcpu = &vmx->vcpu; in set_cr4_guest_host_mask()
4172 vcpu->arch.cr4_guest_owned_bits = KVM_POSSIBLE_CR4_GUEST_BITS & in set_cr4_guest_host_mask()
4173 ~vcpu->arch.cr4_guest_rsvd_bits; in set_cr4_guest_host_mask()
4175 vcpu->arch.cr4_guest_owned_bits &= ~X86_CR4_PGE; in set_cr4_guest_host_mask()
4176 if (is_guest_mode(&vmx->vcpu)) in set_cr4_guest_host_mask()
4177 vcpu->arch.cr4_guest_owned_bits &= in set_cr4_guest_host_mask()
4178 ~get_vmcs12(vcpu)->cr4_guest_host_mask; in set_cr4_guest_host_mask()
4179 vmcs_writel(CR4_GUEST_HOST_MASK, ~vcpu->arch.cr4_guest_owned_bits); in set_cr4_guest_host_mask()
4186 if (!kvm_vcpu_apicv_active(&vmx->vcpu)) in vmx_pin_based_exec_ctrl()
4222 if (vmx->vcpu.arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT) in vmx_exec_control()
4225 if (!cpu_need_tpr_shadow(&vmx->vcpu)) { in vmx_exec_control()
4236 if (kvm_mwait_in_guest(vmx->vcpu.kvm)) in vmx_exec_control()
4239 if (kvm_hlt_in_guest(vmx->vcpu.kvm)) in vmx_exec_control()
4254 * If the control is for an opt-in feature, clear the control if the in vmx_adjust_secondary_exec_control()
4256 * control is opt-out, i.e. an exiting control, clear the control if in vmx_adjust_secondary_exec_control()
4270 vmx->nested.msrs.secondary_ctls_high |= control; in vmx_adjust_secondary_exec_control()
4272 vmx->nested.msrs.secondary_ctls_high &= ~control; in vmx_adjust_secondary_exec_control()
4286 __enabled = guest_cpuid_has(&(vmx)->vcpu, \
4293 /* More macro magic for ENABLE_/opt-in versus _EXITING/opt-out controls. */
4302 struct kvm_vcpu *vcpu = &vmx->vcpu; in vmx_compute_secondary_exec_control()
4310 if (vmx->vpid == 0) in vmx_compute_secondary_exec_control()
4318 if (kvm_pause_in_guest(vmx->vcpu.kvm)) in vmx_compute_secondary_exec_control()
4346 vcpu->arch.xsaves_enabled = xsaves_enabled; in vmx_compute_secondary_exec_control()
4372 vmx->secondary_exec_control = exec_control; in vmx_compute_secondary_exec_control()
4379 * of an EPT paging-structure entry is 110b (write/execute). in ept_set_mmio_spte_mask()
4387 * Noting that the initialization of Guest-state Area of VMCS is in
4396 vmcs_write64(MSR_BITMAP, __pa(vmx->vmcs01.msr_bitmap)); in init_vmcs()
4398 vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */ in init_vmcs()
4407 secondary_exec_controls_set(vmx, vmx->secondary_exec_control); in init_vmcs()
4410 if (kvm_vcpu_apicv_active(&vmx->vcpu)) { in init_vmcs()
4419 vmcs_write64(POSTED_INTR_DESC_ADDR, __pa((&vmx->pi_desc))); in init_vmcs()
4422 if (!kvm_pause_in_guest(vmx->vcpu.kvm)) { in init_vmcs()
4424 vmx->ple_window = ple_window; in init_vmcs()
4425 vmx->ple_window_dirty = true; in init_vmcs()
4443 vmcs_write64(VM_EXIT_MSR_LOAD_ADDR, __pa(vmx->msr_autoload.host.val)); in init_vmcs()
4445 vmcs_write64(VM_ENTRY_MSR_LOAD_ADDR, __pa(vmx->msr_autoload.guest.val)); in init_vmcs()
4448 vmcs_write64(GUEST_IA32_PAT, vmx->vcpu.arch.pat); in init_vmcs()
4455 vmx->vcpu.arch.cr0_guest_owned_bits = KVM_POSSIBLE_CR0_GUEST_BITS; in init_vmcs()
4456 vmcs_writel(CR0_GUEST_HOST_MASK, ~vmx->vcpu.arch.cr0_guest_owned_bits); in init_vmcs()
4460 if (vmx->vpid != 0) in init_vmcs()
4461 vmcs_write16(VIRTUAL_PROCESSOR_ID, vmx->vpid); in init_vmcs()
4467 vmcs_write64(PML_ADDRESS, page_to_phys(vmx->pml_pg)); in init_vmcs()
4468 vmcs_write16(GUEST_PML_INDEX, PML_ENTITY_NUM - 1); in init_vmcs()
4472 vmcs_write64(ENCLS_EXITING_BITMAP, -1ull); in init_vmcs()
4475 memset(&vmx->pt_desc, 0, sizeof(vmx->pt_desc)); in init_vmcs()
4477 vmx->pt_desc.guest.output_mask = 0x7F; in init_vmcs()
4488 vmx->rmode.vm86_active = 0; in vmx_vcpu_reset()
4489 vmx->spec_ctrl = 0; in vmx_vcpu_reset()
4491 vmx->msr_ia32_umwait_control = 0; in vmx_vcpu_reset()
4493 vmx->vcpu.arch.regs[VCPU_REGS_RDX] = get_rdx_init_val(); in vmx_vcpu_reset()
4494 vmx->hv_deadline_tsc = -1; in vmx_vcpu_reset()
4558 __pa(vcpu->arch.apic->regs)); in vmx_vcpu_reset()
4565 vmx->vcpu.arch.cr0 = cr0; in vmx_vcpu_reset()
4572 vpid_sync_context(vmx->vpid); in vmx_vcpu_reset()
4599 int irq = vcpu->arch.interrupt.nr; in vmx_inject_irq()
4603 ++vcpu->stat.irq_injections; in vmx_inject_irq()
4604 if (vmx->rmode.vm86_active) { in vmx_inject_irq()
4606 if (vcpu->arch.interrupt.soft) in vmx_inject_irq()
4607 inc_eip = vcpu->arch.event_exit_inst_len; in vmx_inject_irq()
4612 if (vcpu->arch.interrupt.soft) { in vmx_inject_irq()
4615 vmx->vcpu.arch.event_exit_inst_len); in vmx_inject_irq()
4629 * Tracking the NMI-blocked state in software is built upon in vmx_inject_nmi()
4631 * well-behaving guests: They have to keep IRQs disabled at in vmx_inject_nmi()
4636 vmx->loaded_vmcs->soft_vnmi_blocked = 1; in vmx_inject_nmi()
4637 vmx->loaded_vmcs->vnmi_blocked_time = 0; in vmx_inject_nmi()
4640 ++vcpu->stat.nmi_injections; in vmx_inject_nmi()
4641 vmx->loaded_vmcs->nmi_known_unmasked = false; in vmx_inject_nmi()
4643 if (vmx->rmode.vm86_active) { in vmx_inject_nmi()
4660 return vmx->loaded_vmcs->soft_vnmi_blocked; in vmx_get_nmi_mask()
4661 if (vmx->loaded_vmcs->nmi_known_unmasked) in vmx_get_nmi_mask()
4664 vmx->loaded_vmcs->nmi_known_unmasked = !masked; in vmx_get_nmi_mask()
4673 if (vmx->loaded_vmcs->soft_vnmi_blocked != masked) { in vmx_set_nmi_mask()
4674 vmx->loaded_vmcs->soft_vnmi_blocked = masked; in vmx_set_nmi_mask()
4675 vmx->loaded_vmcs->vnmi_blocked_time = 0; in vmx_set_nmi_mask()
4678 vmx->loaded_vmcs->nmi_known_unmasked = !masked; in vmx_set_nmi_mask()
4693 if (!enable_vnmi && to_vmx(vcpu)->loaded_vmcs->soft_vnmi_blocked) in vmx_nmi_blocked()
4703 if (to_vmx(vcpu)->nested.nested_run_pending) in vmx_nmi_allowed()
4704 return -EBUSY; in vmx_nmi_allowed()
4706 /* An NMI must not be injected into L2 if it's supposed to VM-Exit. */ in vmx_nmi_allowed()
4708 return -EBUSY; in vmx_nmi_allowed()
4725 if (to_vmx(vcpu)->nested.nested_run_pending) in vmx_interrupt_allowed()
4726 return -EBUSY; in vmx_interrupt_allowed()
4729 * An IRQ must not be injected into L2 if it's supposed to VM-Exit, in vmx_interrupt_allowed()
4733 return -EBUSY; in vmx_interrupt_allowed()
4745 mutex_lock(&kvm->slots_lock); in vmx_set_tss_addr()
4748 mutex_unlock(&kvm->slots_lock); in vmx_set_tss_addr()
4752 to_kvm_vmx(kvm)->tss_addr = addr; in vmx_set_tss_addr()
4758 to_kvm_vmx(kvm)->ept_identity_map_addr = ident_addr; in vmx_set_identity_map_addr()
4770 to_vmx(vcpu)->vcpu.arch.event_exit_inst_len = in rmode_exception()
4772 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) in rmode_exception()
4776 return !(vcpu->guest_debug & in rmode_exception()
4800 if (vcpu->arch.halt_request) { in handle_rmode_exception()
4801 vcpu->arch.halt_request = 0; in handle_rmode_exception()
4850 * - Guest CPL == 3 (user mode)
4851 * - Guest has #AC detection enabled in CR0
4852 * - Guest EFLAGS has AC bit set
4866 struct kvm_run *kvm_run = vcpu->run; in handle_exception_nmi()
4871 vect_info = vmx->idt_vectoring_info; in handle_exception_nmi()
4884 if (!vmx->rmode.vm86_active && is_gp_fault(intr_info)) { in handle_exception_nmi()
4889 * IN{S}, OUT{S}, and RDPMC, none of which generate a non-zero in handle_exception_nmi()
4906 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR; in handle_exception_nmi()
4907 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_SIMUL_EX; in handle_exception_nmi()
4908 vcpu->run->internal.ndata = 4; in handle_exception_nmi()
4909 vcpu->run->internal.data[0] = vect_info; in handle_exception_nmi()
4910 vcpu->run->internal.data[1] = intr_info; in handle_exception_nmi()
4911 vcpu->run->internal.data[2] = error_code; in handle_exception_nmi()
4912 vcpu->run->internal.data[3] = vcpu->arch.last_vmentry_cpu; in handle_exception_nmi()
4918 if (enable_ept && !vcpu->arch.apf.host_apf_flags) { in handle_exception_nmi()
4932 if (vmx->rmode.vm86_active && rmode_exception(vcpu, ex_no)) in handle_exception_nmi()
4938 if (!(vcpu->guest_debug & in handle_exception_nmi()
4942 * instruction. ICEBP generates a trap-like #DB, but in handle_exception_nmi()
4944 * is an instruction intercept, i.e. the VM-Exit occurs in handle_exception_nmi()
4949 * if single-step is enabled in RFLAGS and STI or MOVSS in handle_exception_nmi()
4951 * on VM-Exit due to #DB interception. VM-Entry has a in handle_exception_nmi()
4952 * consistency check that a single-step #DB is pending in handle_exception_nmi()
4956 * delay when activating single-step breakpoints must in handle_exception_nmi()
4958 * as appropriate for all other VM-Exits types. in handle_exception_nmi()
4971 kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM; in handle_exception_nmi()
4972 kvm_run->debug.arch.dr7 = vmcs_readl(GUEST_DR7); in handle_exception_nmi()
4980 vmx->vcpu.arch.event_exit_inst_len = in handle_exception_nmi()
4982 kvm_run->exit_reason = KVM_EXIT_DEBUG; in handle_exception_nmi()
4984 kvm_run->debug.arch.pc = vmcs_readl(GUEST_CS_BASE) + rip; in handle_exception_nmi()
4985 kvm_run->debug.arch.exception = ex_no; in handle_exception_nmi()
5002 kvm_run->exit_reason = KVM_EXIT_EXCEPTION; in handle_exception_nmi()
5003 kvm_run->ex.exception = ex_no; in handle_exception_nmi()
5004 kvm_run->ex.error_code = error_code; in handle_exception_nmi()
5012 ++vcpu->stat.irq_exits; in handle_external_interrupt()
5018 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN; in handle_triple_fault()
5019 vcpu->mmio_needed = 0; in handle_triple_fault()
5032 ++vcpu->stat.io_exits; in handle_io()
5055 /* called to set cr0 as appropriate for a mov-to-cr0 exit. */
5067 * hardware. It consists of the L2-owned bits from the new in handle_set_cr0()
5068 * value combined with the L1-owned bits from L1's guest_cr0. in handle_set_cr0()
5070 val = (val & ~vmcs12->cr0_guest_host_mask) | in handle_set_cr0()
5071 (vmcs12->guest_cr0 & vmcs12->cr0_guest_host_mask); in handle_set_cr0()
5081 if (to_vmx(vcpu)->nested.vmxon && in handle_set_cr0()
5096 val = (val & ~vmcs12->cr4_guest_host_mask) | in handle_set_cr4()
5097 (vmcs12->guest_cr4 & vmcs12->cr4_guest_host_mask); in handle_set_cr4()
5108 WARN_ON(!(vcpu->arch.cr4 & X86_CR4_UMIP)); in handle_desc()
5149 * KVM_GUESTDBG_SINGLESTEP-triggered in handle_cr()
5152 vcpu->run->exit_reason = KVM_EXIT_SET_TPR; in handle_cr()
5186 vcpu->run->exit_reason = 0; in handle_cr()
5204 /* Do not handle if the CPL > 0, will trigger GP on re-entry */ in handle_dr()
5210 * As the vm-exit takes precedence over the debug trap, we in handle_dr()
5214 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) { in handle_dr()
5215 vcpu->run->debug.arch.dr6 = DR6_BD | DR6_RTM | DR6_FIXED_1; in handle_dr()
5216 vcpu->run->debug.arch.dr7 = dr7; in handle_dr()
5217 vcpu->run->debug.arch.pc = kvm_get_linear_rip(vcpu); in handle_dr()
5218 vcpu->run->debug.arch.exception = DB_VECTOR; in handle_dr()
5219 vcpu->run->exit_reason = KVM_EXIT_DEBUG; in handle_dr()
5227 if (vcpu->guest_debug == 0) { in handle_dr()
5235 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_WONT_EXIT; in handle_dr()
5255 get_debugreg(vcpu->arch.db[0], 0); in vmx_sync_dirty_debug_regs()
5256 get_debugreg(vcpu->arch.db[1], 1); in vmx_sync_dirty_debug_regs()
5257 get_debugreg(vcpu->arch.db[2], 2); in vmx_sync_dirty_debug_regs()
5258 get_debugreg(vcpu->arch.db[3], 3); in vmx_sync_dirty_debug_regs()
5259 get_debugreg(vcpu->arch.dr6, 6); in vmx_sync_dirty_debug_regs()
5260 vcpu->arch.dr7 = vmcs_readl(GUEST_DR7); in vmx_sync_dirty_debug_regs()
5262 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_WONT_EXIT; in vmx_sync_dirty_debug_regs()
5283 ++vcpu->stat.irq_window_exits; in handle_interrupt_window()
5339 * not cared. So make a short-circuit here by avoiding in handle_apic_access()
5356 /* EOI-induced VM exit is trap-like and thus no need to adjust IP */ in handle_apic_eoi_induced()
5366 /* APIC-write VM exit is trap-like and thus no need to adjust IP */ in handle_apic_write()
5380 idt_v = (vmx->idt_vectoring_info & VECTORING_INFO_VALID_MASK); in handle_task_switch()
5381 idt_index = (vmx->idt_vectoring_info & VECTORING_INFO_VECTOR_MASK); in handle_task_switch()
5382 type = (vmx->idt_vectoring_info & VECTORING_INFO_TYPE_MASK); in handle_task_switch()
5390 vcpu->arch.nmi_injected = false; in handle_task_switch()
5398 if (vmx->idt_vectoring_info & in handle_task_switch()
5424 type == INTR_TYPE_SOFT_INTR ? idt_index : -1, in handle_task_switch()
5442 if (!(to_vmx(vcpu)->idt_vectoring_info & VECTORING_INFO_VALID_MASK) && in handle_ept_violation()
5468 vcpu->arch.exit_qualification = exit_qualification; in handle_ept_violation()
5475 * would also use advanced VM-exit information for EPT violations to in handle_ept_violation()
5506 ++vcpu->stat.nmi_window_exits; in handle_nmi_window()
5521 while (vmx->emulation_required && count-- != 0) { in handle_invalid_guest_state()
5523 return handle_interrupt_window(&vmx->vcpu); in handle_invalid_guest_state()
5531 if (vmx->emulation_required && !vmx->rmode.vm86_active && in handle_invalid_guest_state()
5532 vcpu->arch.exception.pending) { in handle_invalid_guest_state()
5533 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR; in handle_invalid_guest_state()
5534 vcpu->run->internal.suberror = in handle_invalid_guest_state()
5536 vcpu->run->internal.ndata = 0; in handle_invalid_guest_state()
5540 if (vcpu->arch.halt_request) { in handle_invalid_guest_state()
5541 vcpu->arch.halt_request = 0; in handle_invalid_guest_state()
5560 unsigned int old = vmx->ple_window; in grow_ple_window()
5562 vmx->ple_window = __grow_ple_window(old, ple_window, in grow_ple_window()
5566 if (vmx->ple_window != old) { in grow_ple_window()
5567 vmx->ple_window_dirty = true; in grow_ple_window()
5568 trace_kvm_ple_window_update(vcpu->vcpu_id, in grow_ple_window()
5569 vmx->ple_window, old); in grow_ple_window()
5576 unsigned int old = vmx->ple_window; in shrink_ple_window()
5578 vmx->ple_window = __shrink_ple_window(old, ple_window, in shrink_ple_window()
5582 if (vmx->ple_window != old) { in shrink_ple_window()
5583 vmx->ple_window_dirty = true; in shrink_ple_window()
5584 trace_kvm_ple_window_update(vcpu->vcpu_id, in shrink_ple_window()
5585 vmx->ple_window, old); in shrink_ple_window()
5602 * Indicate a busy-waiting vcpu in spinlock. We do not enable the PAUSE
5603 * exiting, so only get here on cpu with PAUSE-Loop-Exiting.
5607 if (!kvm_pause_in_guest(vcpu->kvm)) in handle_pause()
5611 * Intel sdm vol3 ch-25.1.3 says: The "PAUSE-loop exiting" in handle_pause()
5612 * VM-execution control is ignored if CPL > 0. OTOH, KVM in handle_pause()
5686 trace_kvm_pml_full(vcpu->vcpu_id); in handle_pml_full()
5694 if (!(to_vmx(vcpu)->idt_vectoring_info & VECTORING_INFO_VALID_MASK) && in handle_pml_full()
5711 if (!vmx->req_immediate_exit && in handle_fastpath_preemption_timer()
5712 !unlikely(vmx->loaded_vmcs->hv_timer_soft_disabled)) { in handle_fastpath_preemption_timer()
5814 if (!(vmx->exit_reason.failed_vmentry)) { in vmx_get_exit_info()
5815 *info2 = vmx->idt_vectoring_info; in vmx_get_exit_info()
5830 if (vmx->pml_pg) { in vmx_destroy_pml_buffer()
5831 __free_page(vmx->pml_pg); in vmx_destroy_pml_buffer()
5832 vmx->pml_pg = NULL; in vmx_destroy_pml_buffer()
5845 if (pml_idx == (PML_ENTITY_NUM - 1)) in vmx_flush_pml_buffer()
5854 pml_buf = page_address(vmx->pml_pg); in vmx_flush_pml_buffer()
5859 WARN_ON(gpa & (PAGE_SIZE - 1)); in vmx_flush_pml_buffer()
5864 vmcs_write16(GUEST_PML_INDEX, PML_ENTITY_NUM - 1); in vmx_flush_pml_buffer()
5889 vmcs_read32(sel + GUEST_ES_AR_BYTES - GUEST_ES_SELECTOR), in vmx_dump_sel()
5890 vmcs_read32(sel + GUEST_ES_LIMIT - GUEST_ES_SELECTOR), in vmx_dump_sel()
5891 vmcs_readl(sel + GUEST_ES_BASE - GUEST_ES_SELECTOR)); in vmx_dump_sel()
5898 vmcs_readl(limit + GUEST_GDTR_BASE - GUEST_GDTR_LIMIT)); in vmx_dump_dtsel()
6033 pr_err("APIC-access addr = 0x%016llx ", vmcs_read64(APIC_ACCESS_ADDR)); in dump_vmcs()
6034 pr_cont("virt-APIC addr = 0x%016llx\n", vmcs_read64(VIRTUAL_APIC_PAGE_ADDR)); in dump_vmcs()
6055 union vmx_exit_reason exit_reason = vmx->exit_reason; in vmx_handle_exit()
6056 u32 vectoring_info = vmx->idt_vectoring_info; in vmx_handle_exit()
6070 * We should never reach this point with a pending nested VM-Enter, and in vmx_handle_exit()
6073 * nested VM-Enter with an invalid vmcs12. in vmx_handle_exit()
6075 WARN_ON_ONCE(vmx->nested.nested_run_pending); in vmx_handle_exit()
6078 if (vmx->emulation_required) in vmx_handle_exit()
6087 * address-translation-based dirty tracking (e.g. EPT write in vmx_handle_exit()
6101 vcpu->run->exit_reason = KVM_EXIT_FAIL_ENTRY; in vmx_handle_exit()
6102 vcpu->run->fail_entry.hardware_entry_failure_reason in vmx_handle_exit()
6104 vcpu->run->fail_entry.cpu = vcpu->arch.last_vmentry_cpu; in vmx_handle_exit()
6108 if (unlikely(vmx->fail)) { in vmx_handle_exit()
6110 vcpu->run->exit_reason = KVM_EXIT_FAIL_ENTRY; in vmx_handle_exit()
6111 vcpu->run->fail_entry.hardware_entry_failure_reason in vmx_handle_exit()
6113 vcpu->run->fail_entry.cpu = vcpu->arch.last_vmentry_cpu; in vmx_handle_exit()
6121 * The vm-exit can be triggered again after return to guest that in vmx_handle_exit()
6132 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR; in vmx_handle_exit()
6133 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_DELIVERY_EV; in vmx_handle_exit()
6134 vcpu->run->internal.data[0] = vectoring_info; in vmx_handle_exit()
6135 vcpu->run->internal.data[1] = exit_reason.full; in vmx_handle_exit()
6136 vcpu->run->internal.data[2] = vcpu->arch.exit_qualification; in vmx_handle_exit()
6138 vcpu->run->internal.data[ndata++] = in vmx_handle_exit()
6141 vcpu->run->internal.data[ndata++] = vcpu->arch.last_vmentry_cpu; in vmx_handle_exit()
6142 vcpu->run->internal.ndata = ndata; in vmx_handle_exit()
6147 vmx->loaded_vmcs->soft_vnmi_blocked)) { in vmx_handle_exit()
6149 vmx->loaded_vmcs->soft_vnmi_blocked = 0; in vmx_handle_exit()
6150 } else if (vmx->loaded_vmcs->vnmi_blocked_time > 1000000000LL && in vmx_handle_exit()
6151 vcpu->arch.nmi_pending) { in vmx_handle_exit()
6154 * NMI-blocked window if the guest runs with IRQs in vmx_handle_exit()
6158 printk(KERN_WARNING "%s: Breaking out of NMI-blocked " in vmx_handle_exit()
6160 __func__, vcpu->vcpu_id); in vmx_handle_exit()
6161 vmx->loaded_vmcs->soft_vnmi_blocked = 0; in vmx_handle_exit()
6196 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR; in vmx_handle_exit()
6197 vcpu->run->internal.suberror = in vmx_handle_exit()
6199 vcpu->run->internal.ndata = 2; in vmx_handle_exit()
6200 vcpu->run->internal.data[0] = exit_reason.full; in vmx_handle_exit()
6201 vcpu->run->internal.data[1] = vcpu->arch.last_vmentry_cpu; in vmx_handle_exit()
6227 * Clear the per-vcpu flush bit, it gets set again in vmx_l1d_flush()
6231 flush_l1d = vcpu->arch.l1tf_flush_l1d; in vmx_l1d_flush()
6232 vcpu->arch.l1tf_flush_l1d = false; in vmx_l1d_flush()
6235 * Clear the per-cpu flush bit, it gets set again from in vmx_l1d_flush()
6245 vcpu->stat.l1d_flush++; in vmx_l1d_flush()
6256 "movzbl (%[flush_pages], %%" _ASM_AX "), %%ecx\n\t" in vmx_l1d_flush()
6265 "movzbl (%[flush_pages], %%" _ASM_AX "), %%ecx\n\t" in vmx_l1d_flush()
6272 : "eax", "ebx", "ecx", "edx"); in vmx_l1d_flush()
6284 tpr_threshold = (irr == -1 || tpr < irr) ? 0 : irr; in update_cr8_intercept()
6286 to_vmx(vcpu)->nested.l1_tpr_threshold = tpr_threshold; in update_cr8_intercept()
6305 vmx->nested.change_vmcs01_virtual_apic_mode = true; in vmx_set_virtual_apic_mode()
6327 * the guest may have inserted a non-APIC mapping into in vmx_set_virtual_apic_mode()
6350 to_vmx(vcpu)->nested.reload_vmcs01_apic_access_page = true; in vmx_set_apic_access_page_addr()
6358 page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT); in vmx_set_apic_access_page_addr()
6377 if (max_isr == -1) in vmx_hwapic_isr_update()
6394 if (vector == -1) in vmx_set_rvi()
6410 * vmcs12 virtual-interrupt-delivery enabled. in vmx_hwapic_irr_update()
6412 * intercepts external-interrupts and in that case in vmx_hwapic_irr_update()
6426 WARN_ON(!vcpu->arch.apicv_active); in vmx_sync_pir_to_irr()
6427 if (pi_test_on(&vmx->pi_desc)) { in vmx_sync_pir_to_irr()
6428 pi_clear_on(&vmx->pi_desc); in vmx_sync_pir_to_irr()
6435 kvm_apic_update_irr(vcpu, vmx->pi_desc.pir, &max_irr); in vmx_sync_pir_to_irr()
6468 pi_clear_on(&vmx->pi_desc); in vmx_apicv_post_state_restore()
6469 memset(vmx->pi_desc.pir, 0, sizeof(vmx->pi_desc.pir)); in vmx_apicv_post_state_restore()
6485 u32 intr_info = vmx_get_intr_info(&vmx->vcpu); in handle_exception_nmi_irqoff()
6489 vmx->vcpu.arch.apf.host_apf_flags = kvm_read_and_reset_apf_flags(); in handle_exception_nmi_irqoff()
6495 handle_interrupt_nmi_irqoff(&vmx->vcpu, nmi_entry); in handle_exception_nmi_irqoff()
6505 "KVM: unexpected VM-Exit interrupt info: 0x%x", intr_info)) in handle_external_interrupt_irqoff()
6515 if (vmx->emulation_required) in vmx_handle_exit_irqoff()
6518 if (vmx->exit_reason.basic == EXIT_REASON_EXTERNAL_INTERRUPT) in vmx_handle_exit_irqoff()
6520 else if (vmx->exit_reason.basic == EXIT_REASON_EXCEPTION_NMI) in vmx_handle_exit_irqoff()
6550 idtv_info_valid = vmx->idt_vectoring_info & VECTORING_INFO_VALID_MASK; in vmx_recover_nmi_blocking()
6553 if (vmx->loaded_vmcs->nmi_known_unmasked) in vmx_recover_nmi_blocking()
6556 exit_intr_info = vmx_get_intr_info(&vmx->vcpu); in vmx_recover_nmi_blocking()
6561 * Re-set bit "block by NMI" before VM entry if vmexit caused by in vmx_recover_nmi_blocking()
6565 * If the VM exit sets the valid bit in the IDT-vectoring in vmx_recover_nmi_blocking()
6574 vmx->loaded_vmcs->nmi_known_unmasked = in vmx_recover_nmi_blocking()
6577 } else if (unlikely(vmx->loaded_vmcs->soft_vnmi_blocked)) in vmx_recover_nmi_blocking()
6578 vmx->loaded_vmcs->vnmi_blocked_time += in vmx_recover_nmi_blocking()
6580 vmx->loaded_vmcs->entry_time)); in vmx_recover_nmi_blocking()
6594 vcpu->arch.nmi_injected = false; in __vmx_complete_interrupts()
6608 vcpu->arch.nmi_injected = true; in __vmx_complete_interrupts()
6617 vcpu->arch.event_exit_inst_len = vmcs_read32(instr_len_field); in __vmx_complete_interrupts()
6627 vcpu->arch.event_exit_inst_len = vmcs_read32(instr_len_field); in __vmx_complete_interrupts()
6639 __vmx_complete_interrupts(&vmx->vcpu, vmx->idt_vectoring_info, in vmx_complete_interrupts()
6678 if (vmx->req_immediate_exit) { in vmx_update_hv_timer()
6680 vmx->loaded_vmcs->hv_timer_soft_disabled = false; in vmx_update_hv_timer()
6681 } else if (vmx->hv_deadline_tsc != -1) { in vmx_update_hv_timer()
6683 if (vmx->hv_deadline_tsc > tscl) in vmx_update_hv_timer()
6684 /* set_hv_timer ensures the delta fits in 32-bits */ in vmx_update_hv_timer()
6685 delta_tsc = (u32)((vmx->hv_deadline_tsc - tscl) >> in vmx_update_hv_timer()
6691 vmx->loaded_vmcs->hv_timer_soft_disabled = false; in vmx_update_hv_timer()
6692 } else if (!vmx->loaded_vmcs->hv_timer_soft_disabled) { in vmx_update_hv_timer()
6693 vmcs_write32(VMX_PREEMPTION_TIMER_VALUE, -1); in vmx_update_hv_timer()
6694 vmx->loaded_vmcs->hv_timer_soft_disabled = true; in vmx_update_hv_timer()
6700 if (unlikely(host_rsp != vmx->loaded_vmcs->host_state.rsp)) { in vmx_update_host_rsp()
6701 vmx->loaded_vmcs->host_state.rsp = host_rsp; in vmx_update_host_rsp()
6715 vmx->spec_ctrl = __rdmsr(MSR_IA32_SPEC_CTRL); in vmx_spec_ctrl_restore_host()
6725 vmx->spec_ctrl != hostval) in vmx_spec_ctrl_restore_host()
6733 switch (to_vmx(vcpu)->exit_reason.basic) { in vmx_exit_handlers_fastpath()
6773 kvm_arch_has_assigned_device(vcpu->kvm)) in vmx_vcpu_enter_exit()
6778 if (vcpu->arch.cr2 != native_read_cr2()) in vmx_vcpu_enter_exit()
6779 native_write_cr2(vcpu->arch.cr2); in vmx_vcpu_enter_exit()
6781 vmx->fail = __vmx_vcpu_run(vmx, (unsigned long *)&vcpu->arch.regs, in vmx_vcpu_enter_exit()
6784 vcpu->arch.cr2 = native_read_cr2(); in vmx_vcpu_enter_exit()
6817 vmx->loaded_vmcs->soft_vnmi_blocked)) in vmx_vcpu_run()
6818 vmx->loaded_vmcs->entry_time = ktime_get(); in vmx_vcpu_run()
6822 if (vmx->emulation_required) in vmx_vcpu_run()
6825 if (vmx->ple_window_dirty) { in vmx_vcpu_run()
6826 vmx->ple_window_dirty = false; in vmx_vcpu_run()
6827 vmcs_write32(PLE_WINDOW, vmx->ple_window); in vmx_vcpu_run()
6834 WARN_ON_ONCE(vmx->nested.need_vmcs12_to_shadow_sync); in vmx_vcpu_run()
6837 vmcs_writel(GUEST_RSP, vcpu->arch.regs[VCPU_REGS_RSP]); in vmx_vcpu_run()
6839 vmcs_writel(GUEST_RIP, vcpu->arch.regs[VCPU_REGS_RIP]); in vmx_vcpu_run()
6842 if (unlikely(cr3 != vmx->loaded_vmcs->host_state.cr3)) { in vmx_vcpu_run()
6844 vmx->loaded_vmcs->host_state.cr3 = cr3; in vmx_vcpu_run()
6848 if (unlikely(cr4 != vmx->loaded_vmcs->host_state.cr4)) { in vmx_vcpu_run()
6850 vmx->loaded_vmcs->host_state.cr4 = cr4; in vmx_vcpu_run()
6853 /* When single-stepping over STI and MOV SS, we must clear the in vmx_vcpu_run()
6858 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) in vmx_vcpu_run()
6874 * it's non-zero. Since vmentry is serialising on affected CPUs, there in vmx_vcpu_run()
6878 x86_spec_ctrl_set_guest(vmx->spec_ctrl, 0); in vmx_vcpu_run()
6885 current_evmcs->hv_clean_fields |= in vmx_vcpu_run()
6889 current_evmcs->hv_vp_id = vcpu->arch.hyperv.vp_index; in vmx_vcpu_run()
6892 if (vmx->host_debugctlmsr) in vmx_vcpu_run()
6893 update_debugctlmsr(vmx->host_debugctlmsr); in vmx_vcpu_run()
6914 vmx->nested.nested_run_pending = 0; in vmx_vcpu_run()
6915 vmx->idt_vectoring_info = 0; in vmx_vcpu_run()
6917 if (unlikely(vmx->fail)) { in vmx_vcpu_run()
6918 vmx->exit_reason.full = 0xdead; in vmx_vcpu_run()
6922 vmx->exit_reason.full = vmcs_read32(VM_EXIT_REASON); in vmx_vcpu_run()
6923 if (unlikely((u16)vmx->exit_reason.basic == EXIT_REASON_MCE_DURING_VMENTRY)) in vmx_vcpu_run()
6926 trace_kvm_exit(vmx->exit_reason.full, vcpu, KVM_ISA_VMX); in vmx_vcpu_run()
6928 if (unlikely(vmx->exit_reason.failed_vmentry)) in vmx_vcpu_run()
6931 vmx->loaded_vmcs->launched = 1; in vmx_vcpu_run()
6932 vmx->idt_vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD); in vmx_vcpu_run()
6948 if (vcpu->arch.apicv_active) in vmx_vcpu_run()
6964 free_vpid(vmx->vpid); in vmx_free_vcpu()
6966 free_loaded_vmcs(vmx->loaded_vmcs); in vmx_free_vcpu()
6977 err = -ENOMEM; in vmx_create_vcpu()
6979 vmx->vpid = allocate_vpid(); in vmx_create_vcpu()
6988 vmx->pml_pg = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO); in vmx_create_vcpu()
6989 if (!vmx->pml_pg) in vmx_create_vcpu()
6997 int j = vmx->nr_uret_msrs; in vmx_create_vcpu()
7002 vmx->guest_uret_msrs[j].slot = i; in vmx_create_vcpu()
7003 vmx->guest_uret_msrs[j].data = 0; in vmx_create_vcpu()
7018 vmx->guest_uret_msrs[j].mask = ~(u64)TSX_CTRL_CPUID_CLEAR; in vmx_create_vcpu()
7020 vmx->guest_uret_msrs[j].mask = 0; in vmx_create_vcpu()
7023 vmx->guest_uret_msrs[j].mask = -1ull; in vmx_create_vcpu()
7026 ++vmx->nr_uret_msrs; in vmx_create_vcpu()
7029 err = alloc_loaded_vmcs(&vmx->vmcs01); in vmx_create_vcpu()
7034 bitmap_fill(vmx->shadow_msr_intercept.read, MAX_POSSIBLE_PASSTHROUGH_MSRS); in vmx_create_vcpu()
7035 bitmap_fill(vmx->shadow_msr_intercept.write, MAX_POSSIBLE_PASSTHROUGH_MSRS); in vmx_create_vcpu()
7046 if (kvm_cstate_in_guest(vcpu->kvm)) { in vmx_create_vcpu()
7052 vmx->msr_bitmap_mode = 0; in vmx_create_vcpu()
7054 vmx->loaded_vmcs = &vmx->vmcs01; in vmx_create_vcpu()
7057 vcpu->cpu = cpu; in vmx_create_vcpu()
7062 err = alloc_apic_access_page(vcpu->kvm); in vmx_create_vcpu()
7068 err = init_rmode_identity_map(vcpu->kvm); in vmx_create_vcpu()
7074 memcpy(&vmx->nested.msrs, &vmcs_config.nested, sizeof(vmx->nested.msrs)); in vmx_create_vcpu()
7076 memset(&vmx->nested.msrs, 0, sizeof(vmx->nested.msrs)); in vmx_create_vcpu()
7078 vmx->nested.posted_intr_nv = -1; in vmx_create_vcpu()
7079 vmx->nested.current_vmptr = -1ull; in vmx_create_vcpu()
7081 vcpu->arch.microcode_version = 0x100000000ULL; in vmx_create_vcpu()
7082 vmx->msr_ia32_feature_control_valid_bits = FEAT_CTL_LOCKED; in vmx_create_vcpu()
7088 vmx->pi_desc.nv = POSTED_INTR_VECTOR; in vmx_create_vcpu()
7089 vmx->pi_desc.sn = 1; in vmx_create_vcpu()
7091 vmx->ept_pointer = INVALID_PAGE; in vmx_create_vcpu()
7096 free_loaded_vmcs(vmx->loaded_vmcs); in vmx_create_vcpu()
7100 free_vpid(vmx->vpid); in vmx_create_vcpu()
7104 …nt and SMT on, data leak possible. See CVE-2018-3646 and https://www.kernel.org/doc/html/latest/ad…
7105 …tion disabled, data leak possible. See CVE-2018-3646 and https://www.kernel.org/doc/html/latest/ad…
7109 spin_lock_init(&to_kvm_vmx(kvm)->ept_pointer_lock); in vmx_vm_init()
7112 kvm->arch.pause_in_guest = true; in vmx_vm_init()
7149 return -EIO; in vmx_check_processor_compat()
7153 return -EIO; in vmx_check_processor_compat()
7159 return -EIO; in vmx_check_processor_compat()
7178 * When there is no need to deal with noncoherent DMA (e.g., no VT-d in vmx_get_mt_mask()
7179 * or VT-d has snoop control), guest CD/MTRR/PAT are all ignored. The in vmx_get_mt_mask()
7192 if (!kvm_arch_has_noncoherent_dma(vcpu->kvm)) { in vmx_get_mt_mask()
7200 if (kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED)) in vmx_get_mt_mask()
7227 u32 new_ctl = vmx->secondary_exec_control; in vmcs_set_secondary_exec_control()
7235 * (indicating "allowed-1") if they are supported in the guest's CPUID.
7242 vmx->nested.msrs.cr0_fixed1 = 0xffffffff; in nested_vmx_cr_fixed1_bits_update()
7243 vmx->nested.msrs.cr4_fixed1 = X86_CR4_PCE; in nested_vmx_cr_fixed1_bits_update()
7246 if (entry && (entry->_reg & (_cpuid_mask))) \ in nested_vmx_cr_fixed1_bits_update()
7247 vmx->nested.msrs.cr4_fixed1 |= (_cr4_mask); \ in nested_vmx_cr_fixed1_bits_update()
7261 cr4_fixed1_update(X86_CR4_VMXE, ecx, feature_bit(VMX)); in nested_vmx_cr_fixed1_bits_update()
7262 cr4_fixed1_update(X86_CR4_SMXE, ecx, feature_bit(SMX)); in nested_vmx_cr_fixed1_bits_update()
7263 cr4_fixed1_update(X86_CR4_PCIDE, ecx, feature_bit(PCID)); in nested_vmx_cr_fixed1_bits_update()
7264 cr4_fixed1_update(X86_CR4_OSXSAVE, ecx, feature_bit(XSAVE)); in nested_vmx_cr_fixed1_bits_update()
7270 cr4_fixed1_update(X86_CR4_PKE, ecx, feature_bit(PKU)); in nested_vmx_cr_fixed1_bits_update()
7271 cr4_fixed1_update(X86_CR4_UMIP, ecx, feature_bit(UMIP)); in nested_vmx_cr_fixed1_bits_update()
7272 cr4_fixed1_update(X86_CR4_LA57, ecx, feature_bit(LA57)); in nested_vmx_cr_fixed1_bits_update()
7285 vmx->nested.msrs.entry_ctls_high |= VM_ENTRY_LOAD_BNDCFGS; in nested_vmx_entry_exit_ctls_update()
7286 vmx->nested.msrs.exit_ctls_high |= VM_EXIT_CLEAR_BNDCFGS; in nested_vmx_entry_exit_ctls_update()
7288 vmx->nested.msrs.entry_ctls_high &= ~VM_ENTRY_LOAD_BNDCFGS; in nested_vmx_entry_exit_ctls_update()
7289 vmx->nested.msrs.exit_ctls_high &= ~VM_EXIT_CLEAR_BNDCFGS; in nested_vmx_entry_exit_ctls_update()
7304 vmx->pt_desc.caps[CPUID_EAX + i*PT_CPUID_REGS_NUM] = best->eax; in update_intel_pt_cfg()
7305 vmx->pt_desc.caps[CPUID_EBX + i*PT_CPUID_REGS_NUM] = best->ebx; in update_intel_pt_cfg()
7306 vmx->pt_desc.caps[CPUID_ECX + i*PT_CPUID_REGS_NUM] = best->ecx; in update_intel_pt_cfg()
7307 vmx->pt_desc.caps[CPUID_EDX + i*PT_CPUID_REGS_NUM] = best->edx; in update_intel_pt_cfg()
7311 vmx->pt_desc.addr_range = intel_pt_validate_cap(vmx->pt_desc.caps, in update_intel_pt_cfg()
7315 vmx->pt_desc.ctl_bitmask = ~(RTIT_CTL_TRACEEN | RTIT_CTL_OS | in update_intel_pt_cfg()
7319 * If CPUID.(EAX=14H,ECX=0):EBX[0]=1 CR3Filter can be set otherwise in update_intel_pt_cfg()
7322 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_cr3_filtering)) in update_intel_pt_cfg()
7323 vmx->pt_desc.ctl_bitmask &= ~RTIT_CTL_CR3EN; in update_intel_pt_cfg()
7326 * If CPUID.(EAX=14H,ECX=0):EBX[1]=1 CYCEn, CycThresh and in update_intel_pt_cfg()
7329 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_psb_cyc)) in update_intel_pt_cfg()
7330 vmx->pt_desc.ctl_bitmask &= ~(RTIT_CTL_CYCLEACC | in update_intel_pt_cfg()
7334 * If CPUID.(EAX=14H,ECX=0):EBX[3]=1 MTCEn BranchEn and in update_intel_pt_cfg()
7337 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_mtc)) in update_intel_pt_cfg()
7338 vmx->pt_desc.ctl_bitmask &= ~(RTIT_CTL_MTC_EN | in update_intel_pt_cfg()
7341 /* If CPUID.(EAX=14H,ECX=0):EBX[4]=1 FUPonPTW and PTWEn can be set */ in update_intel_pt_cfg()
7342 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_ptwrite)) in update_intel_pt_cfg()
7343 vmx->pt_desc.ctl_bitmask &= ~(RTIT_CTL_FUP_ON_PTW | in update_intel_pt_cfg()
7346 /* If CPUID.(EAX=14H,ECX=0):EBX[5]=1 PwrEvEn can be set */ in update_intel_pt_cfg()
7347 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_power_event_trace)) in update_intel_pt_cfg()
7348 vmx->pt_desc.ctl_bitmask &= ~RTIT_CTL_PWR_EVT_EN; in update_intel_pt_cfg()
7350 /* If CPUID.(EAX=14H,ECX=0):ECX[0]=1 ToPA can be set */ in update_intel_pt_cfg()
7351 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_topa_output)) in update_intel_pt_cfg()
7352 vmx->pt_desc.ctl_bitmask &= ~RTIT_CTL_TOPA; in update_intel_pt_cfg()
7354 /* If CPUID.(EAX=14H,ECX=0):ECX[3]=1 FabircEn can be set */ in update_intel_pt_cfg()
7355 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_output_subsys)) in update_intel_pt_cfg()
7356 vmx->pt_desc.ctl_bitmask &= ~RTIT_CTL_FABRIC_EN; in update_intel_pt_cfg()
7359 for (i = 0; i < vmx->pt_desc.addr_range; i++) in update_intel_pt_cfg()
7360 vmx->pt_desc.ctl_bitmask &= ~(0xfULL << (32 + i * 4)); in update_intel_pt_cfg()
7368 vcpu->arch.xsaves_enabled = false; in vmx_vcpu_after_set_cpuid()
7376 to_vmx(vcpu)->msr_ia32_feature_control_valid_bits |= in vmx_vcpu_after_set_cpuid()
7380 to_vmx(vcpu)->msr_ia32_feature_control_valid_bits &= in vmx_vcpu_after_set_cpuid()
7444 to_vmx(vcpu)->req_immediate_exit = true; in vmx_request_immediate_exit()
7455 if (info->intercept == x86_intercept_in || in vmx_check_intercept_io()
7456 info->intercept == x86_intercept_ins) { in vmx_check_intercept_io()
7457 port = info->src_val; in vmx_check_intercept_io()
7458 size = info->dst_bytes; in vmx_check_intercept_io()
7460 port = info->dst_val; in vmx_check_intercept_io()
7461 size = info->src_bytes; in vmx_check_intercept_io()
7465 * If the 'use IO bitmaps' VM-execution control is 0, IO instruction in vmx_check_intercept_io()
7466 * VM-exits depend on the 'unconditional IO exiting' VM-execution in vmx_check_intercept_io()
7469 * Otherwise, IO instruction VM-exits are controlled by the IO bitmaps. in vmx_check_intercept_io()
7488 switch (info->intercept) { in vmx_check_intercept()
7496 exception->vector = UD_VECTOR; in vmx_check_intercept()
7497 exception->error_code_valid = false; in vmx_check_intercept()
7535 u64 low = a << shift, high = a >> (64 - shift); in u64_shl_div_u64()
7554 struct kvm_timer *ktimer = &vcpu->arch.apic->lapic_timer; in vmx_set_hv_timer()
7559 delta_tsc = max(guest_deadline_tsc, guest_tscl) - guest_tscl; in vmx_set_hv_timer()
7561 ktimer->timer_advance_ns); in vmx_set_hv_timer()
7564 delta_tsc -= lapic_timer_advance_cycles; in vmx_set_hv_timer()
7569 if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio && in vmx_set_hv_timer()
7572 vcpu->arch.tsc_scaling_ratio, &delta_tsc)) in vmx_set_hv_timer()
7573 return -ERANGE; in vmx_set_hv_timer()
7582 return -ERANGE; in vmx_set_hv_timer()
7584 vmx->hv_deadline_tsc = tscl + delta_tsc; in vmx_set_hv_timer()
7591 to_vmx(vcpu)->hv_deadline_tsc = -1; in vmx_cancel_hv_timer()
7597 if (!kvm_pause_in_guest(vcpu->kvm)) in vmx_sched_in()
7648 if (vcpu->arch.mcg_cap & MCG_LMCE_P) in vmx_setup_mce()
7649 to_vmx(vcpu)->msr_ia32_feature_control_valid_bits |= in vmx_setup_mce()
7652 to_vmx(vcpu)->msr_ia32_feature_control_valid_bits &= in vmx_setup_mce()
7659 if (to_vmx(vcpu)->nested.nested_run_pending) in vmx_smi_allowed()
7660 return -EBUSY; in vmx_smi_allowed()
7668 vmx->nested.smm.guest_mode = is_guest_mode(vcpu); in vmx_pre_enter_smm()
7669 if (vmx->nested.smm.guest_mode) in vmx_pre_enter_smm()
7670 nested_vmx_vmexit(vcpu, -1, 0, 0); in vmx_pre_enter_smm()
7672 vmx->nested.smm.vmxon = vmx->nested.vmxon; in vmx_pre_enter_smm()
7673 vmx->nested.vmxon = false; in vmx_pre_enter_smm()
7683 if (vmx->nested.smm.vmxon) { in vmx_pre_leave_smm()
7684 vmx->nested.vmxon = true; in vmx_pre_leave_smm()
7685 vmx->nested.smm.vmxon = false; in vmx_pre_leave_smm()
7688 if (vmx->nested.smm.guest_mode) { in vmx_pre_leave_smm()
7693 vmx->nested.smm.guest_mode = false; in vmx_pre_leave_smm()
7705 return to_vmx(vcpu)->nested.vmxon; in vmx_apic_init_signal_blocked()
7711 struct hrtimer *timer = &to_vmx(vcpu)->nested.preemption_timer; in vmx_migrate_timers()
7880 return -EIO; in hardware_setup()
7972 * and EPT A/D bit features are enabled -- PML depends on them to work. in hardware_setup()
7988 u64 use_timer_freq = 5000ULL * 1000 * 1000; in hardware_setup()
7996 use_timer_freq = (u64)tsc_khz * 1000; in hardware_setup()
8017 return -EINVAL; in hardware_setup()
8075 * Reset everything to support using non-enlightened VMCS in vmx_exit()
8085 vp_ap->nested_control.features.directhypercall = 0; in vmx_exit()
8086 vp_ap->current_nested_vmcs = 0; in vmx_exit()
8087 vp_ap->enlighten_vmentry = 0; in vmx_exit()
8122 pr_info("KVM: vmx: using Hyper-V Enlightened VMCS\n"); in vmx_init()