3  * KVM PMU support for AMD
18 #include "pmu.h"
63 static unsigned int get_msr_base(struct kvm_pmu *pmu, enum pmu_type type)  in get_msr_base()  argument
65 	struct kvm_vcpu *vcpu = pmu_to_vcpu(pmu);  in get_msr_base()
114 static inline struct kvm_pmc *get_gp_pmc_amd(struct kvm_pmu *pmu, u32 msr,  in get_gp_pmc_amd()  argument
142 	return &pmu->gp_counters[msr_to_index(msr)];  in get_gp_pmc_amd()
182 static struct kvm_pmc *amd_pmc_idx_to_pmc(struct kvm_pmu *pmu, int pmc_idx)  in amd_pmc_idx_to_pmc()  argument
184 	unsigned int base = get_msr_base(pmu, PMU_TYPE_COUNTER);  in amd_pmc_idx_to_pmc()
185 	struct kvm_vcpu *vcpu = pmu_to_vcpu(pmu);  in amd_pmc_idx_to_pmc()
195 	return get_gp_pmc_amd(pmu, base + pmc_idx, PMU_TYPE_COUNTER);  in amd_pmc_idx_to_pmc()
201 	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);  in amd_is_valid_rdpmc_ecx()  local
205 	return (idx >= pmu->nr_arch_gp_counters);  in amd_is_valid_rdpmc_ecx()
212 	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);  in amd_rdpmc_ecx_to_pmc()  local
216 	if (idx >= pmu->nr_arch_gp_counters)  in amd_rdpmc_ecx_to_pmc()
218 	counters = pmu->gp_counters;  in amd_rdpmc_ecx_to_pmc()
231 	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);  in amd_msr_idx_to_pmc()  local
234 	pmc = get_gp_pmc_amd(pmu, msr, PMU_TYPE_COUNTER);  in amd_msr_idx_to_pmc()
235 	pmc = pmc ? pmc : get_gp_pmc_amd(pmu, msr, PMU_TYPE_EVNTSEL);  in amd_msr_idx_to_pmc()
242 	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);  in amd_pmu_get_msr()  local
247 	pmc = get_gp_pmc_amd(pmu, msr, PMU_TYPE_COUNTER);  in amd_pmu_get_msr()
253 	pmc = get_gp_pmc_amd(pmu, msr, PMU_TYPE_EVNTSEL);  in amd_pmu_get_msr()
264 	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);  in amd_pmu_set_msr()  local
270 	pmc = get_gp_pmc_amd(pmu, msr, PMU_TYPE_COUNTER);  in amd_pmu_set_msr()
276 	pmc = get_gp_pmc_amd(pmu, msr, PMU_TYPE_EVNTSEL);  in amd_pmu_set_msr()
278 		data &= ~pmu->reserved_bits;  in amd_pmu_set_msr()
289 	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);  in amd_pmu_refresh()  local
292 		pmu->nr_arch_gp_counters = AMD64_NUM_COUNTERS_CORE;  in amd_pmu_refresh()
294 		pmu->nr_arch_gp_counters = AMD64_NUM_COUNTERS;  in amd_pmu_refresh()
296 	pmu->counter_bitmask[KVM_PMC_GP] = ((u64)1 << 48) - 1;  in amd_pmu_refresh()
297 	pmu->reserved_bits = 0xfffffff000280000ull;  in amd_pmu_refresh()
298 	pmu->raw_event_mask = AMD64_RAW_EVENT_MASK;  in amd_pmu_refresh()
299 	pmu->version = 1;  in amd_pmu_refresh()
301 	pmu->counter_bitmask[KVM_PMC_FIXED] = 0;  in amd_pmu_refresh()
302 	pmu->nr_arch_fixed_counters = 0;  in amd_pmu_refresh()
303 	pmu->global_status = 0;  in amd_pmu_refresh()
304 	bitmap_set(pmu->all_valid_pmc_idx, 0, pmu->nr_arch_gp_counters);  in amd_pmu_refresh()
309 	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);  in amd_pmu_init()  local
315 		pmu->gp_counters[i].type = KVM_PMC_GP;  in amd_pmu_init()
316 		pmu->gp_counters[i].vcpu = vcpu;  in amd_pmu_init()
317 		pmu->gp_counters[i].idx = i;  in amd_pmu_init()
318 		pmu->gp_counters[i].current_config = 0;  in amd_pmu_init()
324 	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);  in amd_pmu_reset()  local
328 		struct kvm_pmc *pmc = &pmu->gp_counters[i];  in amd_pmu_reset()