2084 	int reg = VCPU_REGS_RAX;  in em_pusha()
2112 	while (reg >= VCPU_REGS_RAX) {  in em_popa()
2322 	if (((u32) (old >> 0) != (u32) reg_read(ctxt, VCPU_REGS_RAX)) ||  in em_cmpxchg8b()
2324 		*reg_write(ctxt, VCPU_REGS_RAX) = (u32) (old >> 0);  in em_cmpxchg8b()
2392 	ctxt->dst.val = reg_read(ctxt, VCPU_REGS_RAX);  in em_cmpxchg()
2404 		ctxt->src.addr.reg = reg_rmw(ctxt, VCPU_REGS_RAX);  in em_cmpxchg()
3094 	tss->ax = reg_read(ctxt, VCPU_REGS_RAX);  in save_state_to_tss16()
3118 	*reg_write(ctxt, VCPU_REGS_RAX) = tss->ax;  in load_state_from_tss16()
3208 	tss->eax = reg_read(ctxt, VCPU_REGS_RAX);  in save_state_to_tss32()
3237 	*reg_write(ctxt, VCPU_REGS_RAX) = tss->eax;  in load_state_from_tss32()
3671 	*reg_write(ctxt, VCPU_REGS_RAX) = (u32)tsc;  in em_rdtsc()
3682 	*reg_write(ctxt, VCPU_REGS_RAX) = (u32)pmc;  in em_rdpmc()
3774 	msr_data = (u32)reg_read(ctxt, VCPU_REGS_RAX)  in em_wrmsr()
3801 	*reg_write(ctxt, VCPU_REGS_RAX) = (u32)msr_data;  in em_rdmsr()
4064 	eax = reg_read(ctxt, VCPU_REGS_RAX);  in em_cpuid()
4067 	*reg_write(ctxt, VCPU_REGS_RAX) = eax;  in em_cpuid()
4080 	flags &= *reg_rmw(ctxt, VCPU_REGS_RAX) >> 8;  in em_sahf()
4089 	*reg_rmw(ctxt, VCPU_REGS_RAX) &= ~0xff00UL;  in em_lahf()
4090 	*reg_rmw(ctxt, VCPU_REGS_RAX) |= (ctxt->eflags & 0xff) << 8;  in em_lahf()
4265 	eax = reg_read(ctxt, VCPU_REGS_RAX);  in em_xsetbv()
4355 	u64 rax = reg_read(ctxt, VCPU_REGS_RAX);  in check_svme_pa()
5039 		op->addr.reg = reg_rmw(ctxt, VCPU_REGS_RAX);  in decode_operand()
5046 		op->addr.reg = reg_rmw(ctxt, VCPU_REGS_RAX);  in decode_operand()
5130 				(reg_read(ctxt, VCPU_REGS_RAX) & 0xff));  in decode_operand()
5720 		if (ctxt->dst.addr.reg == reg_rmw(ctxt, VCPU_REGS_RAX))  in x86_emulate_insn()