x86/events/perf_event.h

633 struct x86_pmu {  struct
637 	const char	*name;
638 	int		version;
639 	int		(*handle_irq)(struct pt_regs *);
640 	void		(*disable_all)(void);
641 	void		(*enable_all)(int added);
642 	void		(*enable)(struct perf_event *);
643 	void		(*disable)(struct perf_event *);
644 	void		(*add)(struct perf_event *);
645 	void		(*del)(struct perf_event *);
646 	void		(*read)(struct perf_event *event);
647 	int		(*hw_config)(struct perf_event *event);
648 	int		(*schedule_events)(struct cpu_hw_events *cpuc, int n, int *assign);
649 	unsigned	eventsel;
650 	unsigned	perfctr;
651 	int		(*addr_offset)(int index, bool eventsel);
652 	int		(*rdpmc_index)(int index);
653 	u64		(*event_map)(int);
654 	int		max_events;
655 	int		num_counters;
656 	int		num_counters_fixed;
657 	int		cntval_bits;
681 	struct x86_pmu_quirk *quirks;  argument
682 	int		perfctr_second_write;
683 	u64		(*limit_period)(struct perf_event *event, u64 l);
686 	unsigned int	late_ack		:1,
687 			enabled_ack		:1,
688 			counter_freezing	:1;
692 	int		attr_rdpmc_broken;
693 	int		attr_rdpmc;
694 	struct attribute **format_attrs;
696 	ssize_t		(*events_sysfs_show)(char *page, u64 config);
697 	const struct attribute_group **attr_update;
699 	unsigned long	attr_freeze_on_smi;
704 	int		(*cpu_prepare)(int cpu);
705 	void		(*cpu_starting)(int cpu);
706 	void		(*cpu_dying)(int cpu);
707 	void		(*cpu_dead)(int cpu);
709 	void		(*check_microcode)(void);
710 	void		(*sched_task)(struct perf_event_context *ctx,
716 	u64			intel_ctrl;
717 	union perf_capabilities intel_cap;
722 	unsigned int	bts			:1,
723 			bts_active		:1,
724 			pebs			:1,
725 			pebs_active		:1,
726 			pebs_broken		:1,
727 			pebs_prec_dist		:1,
728 			pebs_no_tlb		:1,
729 			pebs_no_isolation	:1;
730 	int		pebs_record_size;
731 	int		pebs_buffer_size;
732 	int		max_pebs_events;
733 	void		(*drain_pebs)(struct pt_regs *regs, struct perf_sample_data *data);
734 	struct event_constraint *pebs_constraints;
735 	void		(*pebs_aliases)(struct perf_event *event);
736 	unsigned long	large_pebs_flags;
737 	u64		rtm_abort_event;
742 	unsigned int	lbr_tos, lbr_from, lbr_to,
743 			lbr_info, lbr_nr;	   /* LBR base regs and size */
744 	union {
748 	union {
752 	bool		lbr_double_abort;	   /* duplicated lbr aborts */
753 	bool		lbr_pt_coexist;		   /* (LBR|BTS) may coexist with PT */
758 	unsigned int	lbr_depth_mask:8;
759 	unsigned int	lbr_deep_c_reset:1;
760 	unsigned int	lbr_lip:1;
761 	unsigned int	lbr_cpl:1;
762 	unsigned int	lbr_filter:1;
763 	unsigned int	lbr_call_stack:1;
764 	unsigned int	lbr_mispred:1;
765 	unsigned int	lbr_timed_lbr:1;
766 	unsigned int	lbr_br_type:1;
768 	void		(*lbr_reset)(void);
769 	void		(*lbr_read)(struct cpu_hw_events *cpuc);
770 	void		(*lbr_save)(void *ctx);
771 	void		(*lbr_restore)(void *ctx);
776 	atomic_t	lbr_exclusive[x86_lbr_exclusive_max];
781 	u64		(*update_topdown_event)(struct perf_event *event);
782 	int		(*set_topdown_event_period)(struct perf_event *event);
789 	void		(*swap_task_ctx)(struct perf_event_context *prev,
795 	unsigned int	amd_nb_constraints : 1;
796 	u64		perf_ctr_pair_en;
801 	struct extra_reg *extra_regs;
802 	unsigned int flags;
807 	struct perf_guest_switch_msr *(*guest_get_msrs)(int *nr);
812 	int (*check_period) (struct perf_event *event, u64 period);
814 	int (*aux_output_match) (struct perf_event *event);