Lines Matching refs:hwc
207 struct hw_perf_event *hwc = &event->hw; in perf_iommu_event_init() local
225 hwc->conf = event->attr.config; in perf_iommu_event_init()
226 hwc->conf1 = event->attr.config1; in perf_iommu_event_init()
239 struct hw_perf_event *hwc = &ev->hw; in perf_iommu_enable_event() local
240 u8 bank = hwc->iommu_bank; in perf_iommu_enable_event()
241 u8 cntr = hwc->iommu_cntr; in perf_iommu_enable_event()
244 reg = GET_CSOURCE(hwc); in perf_iommu_enable_event()
247 reg = GET_DEVID_MASK(hwc); in perf_iommu_enable_event()
248 reg = GET_DEVID(hwc) | (reg << 32); in perf_iommu_enable_event()
253 reg = GET_PASID_MASK(hwc); in perf_iommu_enable_event()
254 reg = GET_PASID(hwc) | (reg << 32); in perf_iommu_enable_event()
259 reg = GET_DOMID_MASK(hwc); in perf_iommu_enable_event()
260 reg = GET_DOMID(hwc) | (reg << 32); in perf_iommu_enable_event()
269 struct hw_perf_event *hwc = &event->hw; in perf_iommu_disable_event() local
272 amd_iommu_pc_set_reg(iommu, hwc->iommu_bank, hwc->iommu_cntr, in perf_iommu_disable_event()
278 struct hw_perf_event *hwc = &event->hw; in perf_iommu_start() local
280 if (WARN_ON_ONCE(!(hwc->state & PERF_HES_STOPPED))) in perf_iommu_start()
283 WARN_ON_ONCE(!(hwc->state & PERF_HES_UPTODATE)); in perf_iommu_start()
284 hwc->state = 0; in perf_iommu_start()
301 amd_iommu_pc_set_reg(iommu, hwc->iommu_bank, hwc->iommu_cntr, in perf_iommu_start()
311 struct hw_perf_event *hwc = &event->hw; in perf_iommu_read() local
314 if (amd_iommu_pc_get_reg(iommu, hwc->iommu_bank, hwc->iommu_cntr, in perf_iommu_read()
330 struct hw_perf_event *hwc = &event->hw; in perf_iommu_stop() local
332 if (hwc->state & PERF_HES_UPTODATE) in perf_iommu_stop()
340 hwc->state |= PERF_HES_UPTODATE; in perf_iommu_stop()
343 WARN_ON_ONCE(hwc->state & PERF_HES_STOPPED); in perf_iommu_stop()
344 hwc->state |= PERF_HES_STOPPED; in perf_iommu_stop()
366 struct hw_perf_event *hwc = &event->hw; in perf_iommu_del() local
374 hwc->iommu_bank, hwc->iommu_cntr); in perf_iommu_del()