113 perf_event_set_period(struct hw_perf_event *hwc, u64 min, u64 max, u64 *hw_period)  in perf_event_set_period()  argument
115 	s64 left = local64_read(&hwc->period_left);  in perf_event_set_period()
116 	s64 period = hwc->sample_period;  in perf_event_set_period()
124 		local64_set(&hwc->period_left, left);  in perf_event_set_period()
125 		hwc->last_period = period;  in perf_event_set_period()
131 		local64_set(&hwc->period_left, left);  in perf_event_set_period()
132 		hwc->last_period = period;  in perf_event_set_period()
158 	struct hw_perf_event *hwc = &event->hw;  in perf_event_try_update()  local
170 	prev_raw_count = local64_read(&hwc->prev_count);  in perf_event_try_update()
171 	if (local64_cmpxchg(&hwc->prev_count, prev_raw_count,  in perf_event_try_update()
187 	local64_sub(delta, &hwc->period_left);  in perf_event_try_update()
260 	struct hw_perf_event *hwc = &event->hw;  in perf_ibs_init()  local
281 	if (hwc->sample_period) {  in perf_ibs_init()
285 		if (!event->attr.sample_freq && hwc->sample_period & 0x0f)  in perf_ibs_init()
292 		hwc->sample_period &= ~0x0FULL;  in perf_ibs_init()
293 		if (!hwc->sample_period)  in perf_ibs_init()
294 			hwc->sample_period = 0x10;  in perf_ibs_init()
299 		hwc->sample_period = event->attr.sample_period;  in perf_ibs_init()
302 	if (!hwc->sample_period)  in perf_ibs_init()
309 	hwc->last_period = hwc->sample_period;  in perf_ibs_init()
310 	local64_set(&hwc->period_left, hwc->sample_period);  in perf_ibs_init()
312 	hwc->config_base = perf_ibs->msr;  in perf_ibs_init()
313 	hwc->config = config;  in perf_ibs_init()
329 			       struct hw_perf_event *hwc, u64 *period)  in perf_ibs_set_period()  argument
334 	overflow = perf_event_set_period(hwc, 1<<4, perf_ibs->max_period, period);  in perf_ibs_set_period()
335 	local64_set(&hwc->prev_count, 0);  in perf_ibs_set_period()
383 					 struct hw_perf_event *hwc, u64 config)  in perf_ibs_enable_event()  argument
385 	u64 tmp = hwc->config | config;  in perf_ibs_enable_event()
388 		wrmsrl(hwc->config_base, tmp & ~perf_ibs->enable_mask);  in perf_ibs_enable_event()
390 	wrmsrl(hwc->config_base, tmp | perf_ibs->enable_mask);  in perf_ibs_enable_event()
401 					  struct hw_perf_event *hwc, u64 config)  in perf_ibs_disable_event()  argument
405 		wrmsrl(hwc->config_base, config);  in perf_ibs_disable_event()
407 	wrmsrl(hwc->config_base, config);  in perf_ibs_disable_event()
418 	struct hw_perf_event *hwc = &event->hw;  in perf_ibs_start()  local
423 	if (WARN_ON_ONCE(!(hwc->state & PERF_HES_STOPPED)))  in perf_ibs_start()
426 	WARN_ON_ONCE(!(hwc->state & PERF_HES_UPTODATE));  in perf_ibs_start()
427 	hwc->state = 0;  in perf_ibs_start()
429 	perf_ibs_set_period(perf_ibs, hwc, &period);  in perf_ibs_start()
442 	perf_ibs_enable_event(perf_ibs, hwc, config);  in perf_ibs_start()
449 	struct hw_perf_event *hwc = &event->hw;  in perf_ibs_stop()  local
460 	if (!stopping && (hwc->state & PERF_HES_UPTODATE))  in perf_ibs_stop()
463 	rdmsrl(hwc->config_base, config);  in perf_ibs_stop()
473 		perf_ibs_disable_event(perf_ibs, hwc, config);  in perf_ibs_stop()
484 		WARN_ON_ONCE(hwc->state & PERF_HES_STOPPED);  in perf_ibs_stop()
485 		hwc->state |= PERF_HES_STOPPED;  in perf_ibs_stop()
488 	if (hwc->state & PERF_HES_UPTODATE)  in perf_ibs_stop()
498 	hwc->state |= PERF_HES_UPTODATE;  in perf_ibs_stop()
604 	struct hw_perf_event *hwc;  in perf_ibs_handle_irq()  local
630 	hwc = &event->hw;  in perf_ibs_handle_irq()
631 	msr = hwc->config_base;  in perf_ibs_handle_irq()
639 	perf_sample_data_init(&data, 0, hwc->last_period);  in perf_ibs_handle_irq()
640 	if (!perf_ibs_set_period(perf_ibs, hwc, &period))  in perf_ibs_handle_irq()
728 		perf_ibs_enable_event(perf_ibs, hwc, new_config);  in perf_ibs_handle_irq()