Lines Matching +full:0 +full:x0000000080000000
11 * 1) load the image directly into ram at address 0 and do an PSW restart
12 * 2) linload will load the image from address 0x10000 to memory 0x10000
13 * and start the code thru LPSW 0x0008000080010000 (VM only, deprecated)
21 * params for kernel are pushed to 0x10400 (see setup.h)
36 #define IPL_BS 0x730
37 .org 0
38 .long 0x00080000,0x80000000+iplstart # The first 24 bytes are loaded
39 .long 0x02000018,0x60000050 # by ipl to addresses 0-23.
40 .long 0x02000068,0x60000050 # (a PSW and two CCWs).
41 .fill 80-24,1,0x40 # bytes 24-79 are discarded !!
42 .long 0x020000f0,0x60000050 # The next 160 byte are loaded
43 .long 0x02000140,0x60000050 # to addresses 0x18-0xb7
44 .long 0x02000190,0x60000050 # They form the continuation
45 .long 0x020001e0,0x60000050 # of the CCW program started
46 .long 0x02000230,0x60000050 # by ipl and load the range
47 .long 0x02000280,0x60000050 # 0x0f0-0x730 from the image
48 .long 0x020002d0,0x60000050 # to the range 0x0f0-0x730
49 .long 0x02000320,0x60000050 # in memory. At the end of
50 .long 0x02000370,0x60000050 # the channel program the PSW
51 .long 0x020003c0,0x60000050 # at location 0 is loaded.
52 .long 0x02000410,0x60000050 # Initial processing starts
53 .long 0x02000460,0x60000050 # at 0x200 = iplstart.
54 .long 0x020004b0,0x60000050
55 .long 0x02000500,0x60000050
56 .long 0x02000550,0x60000050
57 .long 0x020005a0,0x60000050
58 .long 0x020005f0,0x60000050
59 .long 0x02000640,0x60000050
60 .long 0x02000690,0x60000050
61 .long 0x020006e0,0x20000050
63 .org __LC_RST_NEW_PSW # 0x1a0
64 .quad 0,iplstart
65 .org __LC_PGM_NEW_PSW # 0x1d0
66 .quad 0x0000000180000000,startup_pgm_check_handler
68 .org 0x200
80 .quad 0x0000000080000000,.Lioint
82 .long 0x020a0000,0x80000000+.Lioint
88 la %r4,0(%r14)
95 la %r2,0x50(%r2)
102 ssch 0(%r3) # load chunk of 1600 bytes
108 tsch 0(%r5)
127 ahi %r2,0x640 # add 0x640 to total size
132 ahi %r0,0x640
142 .Lorb: .long 0x00000000,0x0080ff00,.Lccws
143 .Lirb: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
144 .Lcr6: .long 0xff000000
145 .Lloadp:.long 0,0
147 .Lcrash:.long 0x000a0000,0x00000000
151 .long 0x02600050,0x00000000
153 .long 0x02200050,0x00000000
159 sigp %r1,%r0,0x12 # switch to esame mode
160 bras %r13,0f
161 .fill 16,4,0x0
162 0: lmh %r0,%r15,0(%r13) # clear high-order half of gprs
185 clc 0(3,%r4),.L_hdr # if it is HDRx
187 clc 0(3,%r4),.L_eof # if it is EOFx
189 la %r5,0(%r4,%r2)
192 mvc 0(256,%r3),0(%r4)
199 ic %r0,0(%r2,%r3)
200 chi %r0,0x20 # is it a space ?
208 stc %r0,0(%r2,%r3) # terminate buffer
225 clc 0(3,%r2),.L_hdr # skip HDRx and EOFx
227 clc 0(3,%r2),.L_eof
234 tm .Lcpuid,0xff # running VM ?
240 stsch 0(%r5) # check if irq is pending
241 tm 30(%r5),0x0f # by verifying if any of the
243 tm 31(%r5),0xff # bits is set in the schib
250 tsch 0(%r5)
264 .Lreset:.byte 0xc3,0xc8,0xc1,0xd5,0xc7,0xc5,0x40,0xd9,0xc4,0xd9,0x40
265 .byte 0xc1,0xd3,0xd3,0x40,0xd2,0xc5,0xc5,0xd7,0x40,0xd5,0xd6
266 .byte 0xc8,0xd6,0xd3,0xc4 # "change rdr all keep nohold"
267 .L_eof: .long 0xc5d6c600 /* C'EOF' */
268 .L_hdr: .long 0xc8c4d900 /* C'HDR' */
270 .Lcpuid:.fill 8,1,0
273 # startup-code at 0x10000, running in absolute addressing mode
277 .org 0x10000
282 # This is a list of s390 kernel entry points. At address 0x1000f the number of
288 .byte 0x00,0x01
290 # kdump startup-code at 0x10010, running in 64 bit absolute addressing mode
292 .org 0x10010
299 sigp %r1,%r0,0x12 # switch to esame mode
300 bras %r13,0f
301 .fill 16,4,0x0
302 0: lmh %r0,%r15,0(%r13) # clear high-order half of gprs
304 basr %r13,0 # get base
306 xc 0x200(256),0x200 # partially clear lowcore
307 xc 0x300(256),0x300
308 xc 0xe00(256),0xe00
309 xc 0xf00(256),0xf00
320 .long 0x8000 + (1<<(PAGE_SHIFT+BOOT_STACK_ORDER)) - STACK_FRAME_OVERHEAD
322 6: .long 0x7fffffff,0xffffffff
324 .Lctl: .quad 0x04040000 # cr0: AFP registers & secondary space
325 .quad 0 # cr1: primary space segment table
327 .quad 0 # cr3: instruction authorization
328 .quad 0xffff # cr4: instruction authorization
330 .quad 0 # cr6: I/O interrupts
331 .quad 0 # cr7: secondary space segment table
332 .quad 0x0000000000008000 # cr8: access registers translation
333 .quad 0 # cr9: tracing off
334 .quad 0 # cr10: tracing off
335 .quad 0 # cr11: tracing off
336 .quad 0 # cr12: tracing off
337 .quad 0 # cr13: home space segment table
338 .quad 0xc0000000 # cr14: machine check handling off
342 .Lduct: .long 0,.Laste,.Laste,0,.Lduald,0,0,0
343 .long 0,0,0,0,0,0,0,0
345 .long 0,0,0x89000000,0,0,0,0x8a000000,0
347 .Laste: .quad 0,0xffffffffffffffff,0,0,0,0,0,0
350 .long 0x80000000,0,0,0 # invalid access-list entries
370 ni __LC_RETURN_PSW,0xfc # remove IO and EX bits
371 ni __LC_RETURN_PSW+1,0xfb # remove MCHK bit
372 oi __LC_RETURN_PSW+1,0x2 # set wait state bit
382 .long 0x5000 + PAGE_SIZE - STACK_FRAME_OVERHEAD
390 .quad 0 # IPL_DEVICE
391 .quad 0 # INITRD_START
392 .quad 0 # INITRD_SIZE
393 .quad 0 # OLDMEM_BASE
394 .quad 0 # OLDMEM_SIZE
399 .byte 0