148 	struct pnv_phb *phb = pci_bus_to_pnvhb(pdev->bus);  in pnv_pci_ioda_fixup_iov_resources()  local
159 	mul = phb->ioda.total_pe_num;  in pnv_pci_ioda_fixup_iov_resources()
183 		if (vf_bar_sz > (phb->ioda.m64_segsize >> 2)) {  in pnv_pci_ioda_fixup_iov_resources()
257 	struct pnv_phb *phb = pci_bus_to_pnvhb(pdev->bus);  in pnv_pci_iov_resource_alignment()  local
287 	return phb->ioda.total_pe_num * align;  in pnv_pci_iov_resource_alignment()
293 	struct pnv_phb        *phb;  in pnv_pci_vf_release_m64()  local
296 	phb = pci_bus_to_pnvhb(pdev->bus);  in pnv_pci_vf_release_m64()
300 		opal_pci_phb_mmio_enable(phb->opal_id,  in pnv_pci_vf_release_m64()
305 		clear_bit(window_id, &phb->ioda.m64_bar_alloc);  in pnv_pci_vf_release_m64()
317 static int64_t pnv_ioda_map_m64_segmented(struct pnv_phb *phb,  in pnv_ioda_map_m64_segmented()  argument
324 	rc = opal_pci_set_phb_mem_window(phb->opal_id,  in pnv_ioda_map_m64_segmented()
333 	rc = opal_pci_phb_mmio_enable(phb->opal_id,  in pnv_ioda_map_m64_segmented()
344 static int64_t pnv_ioda_map_m64_single(struct pnv_phb *phb,  in pnv_ioda_map_m64_single()  argument
369 	rc = opal_pci_map_pe_mmio_window(phb->opal_id,  in pnv_ioda_map_m64_single()
380 	rc = opal_pci_set_phb_mem_window(phb->opal_id,  in pnv_ioda_map_m64_single()
393 	rc = opal_pci_phb_mmio_enable(phb->opal_id,  in pnv_ioda_map_m64_single()
404 static int pnv_pci_alloc_m64_bar(struct pnv_phb *phb, struct pnv_iov_data *iov)  in pnv_pci_alloc_m64_bar()  argument
409 		win = find_next_zero_bit(&phb->ioda.m64_bar_alloc,  in pnv_pci_alloc_m64_bar()
410 				phb->ioda.m64_bar_idx + 1, 0);  in pnv_pci_alloc_m64_bar()
412 		if (win >= phb->ioda.m64_bar_idx + 1)  in pnv_pci_alloc_m64_bar()
414 	} while (test_and_set_bit(win, &phb->ioda.m64_bar_alloc));  in pnv_pci_alloc_m64_bar()
424 	struct pnv_phb        *phb;  in pnv_pci_vf_assign_m64()  local
432 	phb = pci_bus_to_pnvhb(pdev->bus);  in pnv_pci_vf_assign_m64()
442 			win = pnv_pci_alloc_m64_bar(phb, iov);  in pnv_pci_vf_assign_m64()
449 			rc = pnv_ioda_map_m64_segmented(phb, win, start, size);  in pnv_pci_vf_assign_m64()
461 			win = pnv_pci_alloc_m64_bar(phb, iov);  in pnv_pci_vf_assign_m64()
466 			rc = pnv_ioda_map_m64_single(phb, win,  in pnv_pci_vf_assign_m64()
483 	struct pnv_phb        *phb;  in pnv_ioda_release_vf_PE()  local
486 	phb = pci_bus_to_pnvhb(pdev->bus);  in pnv_ioda_release_vf_PE()
492 	list_for_each_entry_safe(pe, pe_n, &phb->ioda.pe_list, list) {  in pnv_ioda_release_vf_PE()
499 		mutex_lock(&phb->ioda.pe_list_mutex);  in pnv_ioda_release_vf_PE()
501 		mutex_unlock(&phb->ioda.pe_list_mutex);  in pnv_ioda_release_vf_PE()
503 		pnv_ioda_deconfigure_pe(phb, pe);  in pnv_ioda_release_vf_PE()
622 	struct pnv_phb        *phb;  in pnv_ioda_setup_vf_PE()  local
632 	phb = pci_bus_to_pnvhb(pdev->bus);  in pnv_ioda_setup_vf_PE()
643 		pe->phb = phb;  in pnv_ioda_setup_vf_PE()
655 		if (pnv_ioda_configure_pe(phb, pe)) {  in pnv_ioda_setup_vf_PE()
663 		mutex_lock(&phb->ioda.pe_list_mutex);  in pnv_ioda_setup_vf_PE()
664 		list_add_tail(&pe->list, &phb->ioda.pe_list);  in pnv_ioda_setup_vf_PE()
665 		mutex_unlock(&phb->ioda.pe_list_mutex);  in pnv_ioda_setup_vf_PE()
676 		pnv_pci_ioda2_setup_dma_pe(phb, pe);  in pnv_ioda_setup_vf_PE()
684 	struct pnv_phb        *phb;  in pnv_pci_sriov_enable()  local
688 	phb = pci_bus_to_pnvhb(pdev->bus);  in pnv_pci_sriov_enable()
698 	if (phb->type != PNV_PHB_IODA2) {  in pnv_pci_sriov_enable()
709 	base_pe = pnv_ioda_alloc_pe(phb, num_vfs);  in pnv_pci_sriov_enable()