16 PMU_FORMAT_ATTR(pmc,		"config:16-19");
47 	/* Only check pmc, unit and pmcxsel, ignore the edge bit (0) */  in event_is_fab_match()
127 static unsigned long combine_shift(unsigned long pmc)  in combine_shift()  argument
130 		return p9_MMCR1_COMBINE_SHIFT(pmc);  in combine_shift()
132 	return MMCR1_COMBINE_SHIFT(pmc);  in combine_shift()
261 	unsigned int unit, pmc, cache, ebb;  in isa207_get_constraint()  local
269 	pmc   = (event >> EVENT_PMC_SHIFT)        & EVENT_PMC_MASK;  in isa207_get_constraint()
279 	if (pmc) {  in isa207_get_constraint()
282 		if (pmc > 6)  in isa207_get_constraint()
288 		if (pmc >= 5 && base_event != 0x500fa &&  in isa207_get_constraint()
292 		mask  |= CNST_PMC_MASK(pmc);  in isa207_get_constraint()
293 		value |= CNST_PMC_VAL(pmc);  in isa207_get_constraint()
301 		if (pmc >= 5)  in isa207_get_constraint()
305 	if (pmc <= 4) {  in isa207_get_constraint()
308 		 * a PMC of 0 - they still need a PMC, it's just assigned later.  in isa207_get_constraint()
309 		 * Don't count events on PMC 5 & 6, there is only one valid event  in isa207_get_constraint()
327 			if (pmc == 4)  in isa207_get_constraint()
386 	if (!pmc && ebb)  in isa207_get_constraint()
387 		/* EBB events must specify the PMC */  in isa207_get_constraint()
419 	unsigned int pmc, pmc_inuse;  in isa207_compute_mmcr()  local
426 		pmc = (event[i] >> EVENT_PMC_SHIFT) & EVENT_PMC_MASK;  in isa207_compute_mmcr()
427 		if (pmc)  in isa207_compute_mmcr()
428 			pmc_inuse |= 1 << pmc;  in isa207_compute_mmcr()
442 		pmc     = (event[i] >> EVENT_PMC_SHIFT) & EVENT_PMC_MASK;  in isa207_compute_mmcr()
447 		if (!pmc) {  in isa207_compute_mmcr()
448 			for (pmc = 1; pmc <= 4; ++pmc) {  in isa207_compute_mmcr()
449 				if (!(pmc_inuse & (1 << pmc)))  in isa207_compute_mmcr()
453 			pmc_inuse |= 1 << pmc;  in isa207_compute_mmcr()
456 		if (pmc <= 4) {  in isa207_compute_mmcr()
457 			mmcr1 |= unit << MMCR1_UNIT_SHIFT(pmc);  in isa207_compute_mmcr()
458 			mmcr1 |= combine << combine_shift(pmc);  in isa207_compute_mmcr()
459 			mmcr1 |= psel << MMCR1_PMCSEL_SHIFT(pmc);  in isa207_compute_mmcr()
528 			mmcr2 |= MMCR2_FCP(pmc);  in isa207_compute_mmcr()
531 			mmcr2 |= MMCR2_FCH(pmc);  in isa207_compute_mmcr()
535 				mmcr2 |= MMCR2_FCH(pmc);  in isa207_compute_mmcr()
537 				mmcr2 |= MMCR2_FCS(pmc);  in isa207_compute_mmcr()
541 			if (pmc <= 4) {  in isa207_compute_mmcr()
544 				mmcr3 |= val << MMCR3_SHIFT(pmc);  in isa207_compute_mmcr()
548 		hwc[i] = pmc - 1;  in isa207_compute_mmcr()
561 	/* If we're not using PMC 5 or 6, freeze them */  in isa207_compute_mmcr()
581 void isa207_disable_pmc(unsigned int pmc, struct mmcr_regs *mmcr)  in isa207_disable_pmc()  argument
583 	if (pmc <= 3)  in isa207_disable_pmc()
584 		mmcr->mmcr1 &= ~(0xffUL << MMCR1_PMCSEL_SHIFT(pmc + 1));  in isa207_disable_pmc()