Lines Matching refs:imm
411 if (insn->imm >= S16_MIN && insn->imm <= S16_MAX) { in gen_imm_to_reg()
412 emit_instr(ctx, addiu, reg, MIPS_R_ZERO, insn->imm); in gen_imm_to_reg()
414 int lower = (s16)(insn->imm & 0xffff); in gen_imm_to_reg()
415 int upper = insn->imm - lower; in gen_imm_to_reg()
473 if (insn->imm >= lower_bound && insn->imm <= upper_bound) { in gen_imm_insn()
477 emit_instr(ctx, daddiu, dst, MIPS_R_ZERO, insn->imm); in gen_imm_insn()
481 emit_instr(ctx, andi, dst, dst, insn->imm); in gen_imm_insn()
485 emit_instr(ctx, ori, dst, dst, insn->imm); in gen_imm_insn()
489 emit_instr(ctx, xori, dst, dst, insn->imm); in gen_imm_insn()
492 emit_instr(ctx, daddiu, dst, dst, insn->imm); in gen_imm_insn()
495 emit_instr(ctx, daddiu, dst, dst, -insn->imm); in gen_imm_insn()
498 emit_instr(ctx, dsrl_safe, dst, dst, insn->imm & 0x3f); in gen_imm_insn()
501 emit_instr(ctx, srl, dst, dst, insn->imm & 0x1f); in gen_imm_insn()
504 emit_instr(ctx, dsll_safe, dst, dst, insn->imm & 0x3f); in gen_imm_insn()
507 emit_instr(ctx, sll, dst, dst, insn->imm & 0x1f); in gen_imm_insn()
510 emit_instr(ctx, dsra_safe, dst, dst, insn->imm & 0x3f); in gen_imm_insn()
513 emit_instr(ctx, sra, dst, dst, insn->imm & 0x1f); in gen_imm_insn()
516 emit_instr(ctx, addiu, dst, MIPS_R_ZERO, insn->imm); in gen_imm_insn()
519 emit_instr(ctx, addiu, dst, dst, insn->imm); in gen_imm_insn()
522 emit_instr(ctx, addiu, dst, dst, -insn->imm); in gen_imm_insn()
702 if (insn->imm == 1) /* Mult by 1 is a nop */ in build_one_insn()
729 if (insn->imm == 1) /* Mult by 1 is a nop */ in build_one_insn()
752 if (insn->imm == 0) in build_one_insn()
761 if (insn->imm == 1) { in build_one_insn()
783 if (insn->imm == 0) in build_one_insn()
790 if (insn->imm == 1) { in build_one_insn()
1007 if (insn->imm == 0) { in build_one_insn()
1160 if (insn->imm == 0) { in build_one_insn()
1207 t64s = insn->imm + 1; in build_one_insn()
1209 t64s = insn->imm + 1; in build_one_insn()
1211 t64s = insn->imm; in build_one_insn()
1239 t64s = (u64)(u32)(insn->imm) + 1; in build_one_insn()
1241 t64s = (u64)(u32)(insn->imm) + 1; in build_one_insn()
1243 t64s = (u64)(u32)(insn->imm); in build_one_insn()
1258 if (ctx->use_bbit_insns && hweight32((u32)insn->imm) == 1) { in build_one_insn()
1263 emit_instr(ctx, bbit0, dst, ffs((u32)insn->imm) - 1, b_off); in build_one_insn()
1270 emit_instr(ctx, bbit1, dst, ffs((u32)insn->imm) - 1, b_off); in build_one_insn()
1274 t64 = (u32)insn->imm; in build_one_insn()
1304 t64 = ((u64)(u32)insn->imm) | ((u64)(insn + 1)->imm << 32); in build_one_insn()
1310 t64s = (s64)insn->imm + (long)__bpf_call_base; in build_one_insn()
1328 if (insn->imm == 64 && td == REG_32BIT) in build_one_insn()
1331 if (insn->imm != 64 && td == REG_64BIT) { in build_one_insn()
1341 if (insn->imm == 16) { in build_one_insn()
1345 } else if (insn->imm == 32) { in build_one_insn()
1596 if (insn->imm >= 0) in reg_val_propagate_range()
1603 if (insn->imm == 64) in reg_val_propagate_range()
1605 else if (insn->imm == 32) in reg_val_propagate_range()
1621 if (insn->imm >= 0) in reg_val_propagate_range()
1638 val = (s64)((u32)insn->imm | ((u64)(insn + 1)->imm << 32)); in reg_val_propagate_range()
1658 insn->imm >= 0 ? REG_32BIT_POS : REG_32BIT); in reg_val_propagate_range()